assign6-soln - flops. Show that when states 000 and 011 are...

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Electrical and Computer Engineering 19/10/2010 1 EECE256 Assignment 6 1. Design a four bit binary synchronous counter with D flip-flops and logic gates.
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Electrical and Computer Engineering 19/10/2010 2 2. Design a counter which cycles through the binary sequence (1,2,4,5,6,7) using J/K flip-
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Unformatted text preview: flops. Show that when states 000 and 011 are used as dont care statements the counter may not operate properly. Suggest how to correct this problem. Electrical and Computer Engineering 19/10/2010 3...
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This note was uploaded on 12/21/2010 for the course EECE EECE 256 taught by Professor Sidney during the Spring '10 term at The University of British Columbia.

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assign6-soln - flops. Show that when states 000 and 011 are...

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