12 - 22-Sep-103:19 PM Sequential Logic, FFs EEL 3701 EEL...

Info iconThis preview shows pages 1–4. Sign up to view the full content.

View Full Document Right Arrow Icon
22-Sep-10—3:19 PM Sequential Logic, FFs 1 University of Florida, EEL 3701 – File 12 © Drs. Schwartz & Arroyo EEL 3701 EEL 3701 Menu Part 2 of 3701: Sequential Digital Machines • Latches and Flip-Flops: >S-R latches >D latches >T latches Look into my . .. 1 University of Florida, EEL 3701 – File 12 © Drs. Schwartz & Arroyo EEL 3701 EEL 3701 Topic 2 : Sequential Digital Machines or Sequential Logic SLIDE from Lecture #2 Comb. Logic Network Memory Q Q + n m k k XY 2 University of Florida, EEL 3701 – File 12 © Drs. Schwartz & Arroyo Y = F(Q,X) There are m equations or m scalar functions. Each Q is called a state a summary of the past or historical behavior. Q + = G(Q,X) There are k equations or k scalar functions.
Background image of page 1

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
22-Sep-10—3:19 PM Sequential Logic, FFs 2 University of Florida, EEL 3701 – File 12 © Drs. Schwartz & Arroyo EEL 3701 EEL 3701 Sequential Logic and Memory • General Model Combinational Logic X Y Q + = F(Q X Memory QQ + • Observation: All circuits so far have had no feedback. • What happens if we add feedback? Z F(Q,X) Y = G(Q,X) 3_Nots.cct 3 University of Florida, EEL 3701 – File 12 © Drs. Schwartz & Arroyo Z = H L H L Z = L H L H Z t >f 20MHz >We call this a “un-gated” oscillator or clock >Z turns on & off >Go to LogicWorks (stick/unstick) EEL 3701 EEL 3701 Gated-Oscillators • Consider what happens if we replace the first Level-Shifter Z with a NAND gate • We call this a “gated-” oscillator or clock • X turns it on & off >Go to LogicWorks Y X When X=1 Y t 4 University of Florida, EEL 3701 – File 12 © Drs. Schwartz & Arroyo Gated_Osc.cct • Note that the circuit is stable! • What if we connect the following circuit
Background image of page 2
22-Sep-10—3:19 PM Sequential Logic, FFs 3 University of Florida, EEL 3701 – File 12 © Drs. Schwartz & Arroyo EEL 3701 EEL 3701 Consider the following circuit: Latch: The Beginning Tracing through the circuit: z 1 x 0 x 1 z 0 z 1 z 0 z 1 z 1 = /x 1 + x 0 z 1 x 0 z 1 x 0 x 1 z 1 01 00 1 1 0 0 /x 1 LLLHHHH LLHHL LHLHHLH LHHHL HLLHH H L H H L H L SR.cct 5 University of Florida, EEL 3701 – File 12 © Drs. Schwartz & Arroyo K-Map for z 1 (everything active-high) 0 1 11 0 1 10 • This device is called a latch or “Flip- Flop.” It flip flops between 2 states.
Background image of page 3

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Image of page 4
This is the end of the preview. Sign up to access the rest of the document.

Page1 / 10

12 - 22-Sep-103:19 PM Sequential Logic, FFs EEL 3701 EEL...

This preview shows document pages 1 - 4. Sign up to view the full document.

View Full Document Right Arrow Icon
Ask a homework question - tutors are online