Unformatted text preview: ECE102Fall 2010 Homework #1 Use the following device constants unless otherwise noted Cox=2E‐8 F/cm2, n = 3500 cm2/V‐sec, VTN=0.5 V, p=1500 cm2/V‐sec, and VTP=‐0.6 V 1. Use Matlab to graph the ID‐VDS curves for an NFET with W=10um and L=0.25um. Sweep VGS from 0 to 1.5V in 0.25V steps and VDS from 0 to 3V. 2. Use Matlab to plot ID as a function of VGS for the diode‐connected NFET shown where W=10um and L=0.25um. Sweep VGS from 0 to 1.5V. Increase the device width to 25um and repeat. 3. Find ID in the following circuits using Matlab. The bias voltages equal VG=1.2V and VDD=2.0V. The dimensions for the NFET are W=20um and L=0.5um, with =0.05V‐1. RS=1000 and RD=5000. (a) (b) 4. Find expressions for the dc operating point (VB1 and VB2) of the following circuit with IB=250uA. PFET P1 measures W=20um and L=0.25um while transistor P2 measures W=25um and L=0.25um. Let VDD=2.5V and ignore . 5. Determine the value of IOUT for the two current mirrors shown. NFET transistors N1‐N2 are 60um wide while N3‐N4 are 40um wide. All NFET devices have L=2um. Transistor P1 measures W=80um and L=0.5um while device P2 measures W=10um and L=1um. For the circuits, VDD=2.0V, IREF=250uA, and R1=250. Also find the minimum value for VB for circuit (a) to keep all the devices in saturation. Use Matlab to solve circuit (b). Ignore . (a) (b) 6. Find the load line for the following common source amplifier. VDD=2.4V and IDMAX corresponds to the following condition (VG=1.5V and VDS=VDSAT). For the transistor, W=25um and L=0.5um. Ignore . 7. Determine av, rin, and rout for the following amplifiers. The transistor measures W=25um and L=0.25um. RG=1500 and RD=1000. Assume ID=100uA, all devices operate in saturation, and =0.05V‐1. VDD RD
IN OUT (a) (b) IB RG (c) 8. Find an expression for the voltage gain av for each of the following circuits.Use KN# and KP# as short‐hand for 1/2COX(W/L)#. Assume all devices operate in saturation and =0. (a) (b) VDD RD
OUT (c) RF
IN N1 VB (d) (e) (f) 9. Use Matlab to plot IOUT as a function of Vin for the following differential pair. Sweep Vin from ‐2V to +2V. Assume IB is constant and equals 100uA. Ignore . a) Size the two NFETs identically at W=100um and L=0.25um. b) Increase only the width of N1 to 120um. Keep the other dimensions the same. c) Size the width of N1 to 50um and the width of N2 to 60um, with the length of both devices equal to 0.5um. 10. Find the appropriate values for VB1 and VB2 in the following circuit so that ID3=50uA (when Vin=0). Device N3 should be biased at VDSAT. Sweep Vin from ‐2V to +2V and plot ID3 using Matlab. All devices initially operate in saturation. Next lower VB1 by 100mV and sweep Vin again. (This biases device N3 in triode.) Device dimensions are as follows: N1=N2 (W=75um, L=0.25um) and N3 (W=100um and L=10um). Set =0.05V . ‐1 11. Using Matlab plot the transconductance gm of the differential pair analyzed in Figure 9. (There should be two plots, one for each value of VB1.) PSPICE simulations 12. Sweep VGS from 0 to +2V and plot ID for circuit (a). Transistor dimensions are W=10um and L=0.25um. Plot on the same graph the results when the “fast” and “slow” models are used. Repeat for circuit (b) using the same device dimensions and VDD=2.0V. Estimate the threshold voltage VT and the intrinsic gain K=1/2COX for all six devices and compare. (a) (b) 13. Find the PFET dimensions (typical models) and bias voltage VG that set VB1=1.75V and VB1=1.0V when IB=10uA and VDD=2.5V. Hint – design the NFET current source first. All devices should be in saturation. How does VB1 and VB2 change with process (5 cases to check)? 14. Design a low‐voltage current mirror based on the circuit shown with IREF=25uA, IOUT=100uA, and rOUT>100k. Set the length of devices N1 and N2 to L=0.25um. The widths of all devices should match. Re‐simulate using “fast” and “slow” models. 15. Design a cascade amplifier with av=6, ID=100uA, and VDD=2.5V. Set RS=2000. Next find rin and rout for the design. Re‐simulate the design using “fast” models and adjust the value of voltage VB1 to achieve av=6. Find rin and rout. Repeat for the “slow” models. 16. Design a differential pair amplifier for av=4 at vin=0. Set ID3 approximately equal to 100uA. Plot av as a function of vin, sweeping vin until the gain is less than 0.1. The gain must be at least 0.25 at vin>100mV. (If not, re‐size devices N1 and N2.) The supply equals VDD=3V. All devices should operate in saturation. Re‐simulate and plot av with “fast” and “slow” models. ...
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This note was uploaded on 01/08/2011 for the course ECE ece287b taught by Professor Cs during the Fall '10 term at UCSD.
- Fall '10