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Unformatted text preview: b) Perform AB using binary addition [i.e., A + (B)]. Is the result correct? c) Perform BA using binary subtraction. Is the result correct? d) Obtain the result of performing two arithmetic right shifts to the number A 4. The diagram below is a &quot;typical stage i&quot; of a register (with its neighboring stage i1 shown in the dashed box). Analyze the circuit by going through sequential circuit analysis procedures including combinational analysis, state transition and state table, and state diagram. What operations can this register perform? Clock ci 5 . Design a variable length upidown counter using JK FFs and NAND gates. The control input, K, controls the length and direction of the count: If K=O, the counting sequence is 0,1,0,1, .... If K=l, the sequence is 3,2,1,3,2,1, .... The next state of any invalid stateinput combination shouldgo to 1. Show all design steps starting with a state diagram. I clock...
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This note was uploaded on 01/11/2011 for the course ENGR 356 taught by Professor Valverde during the Fall '08 term at S.F. State.
 Fall '08
 Valverde
 Computer Architecture

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