03 Minimization of Logic Function

03 Minimization of Logic Function - EE2000 Logic Circuit...

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1 EE2000 Logic Circuit Design Minimization of Logic Function
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2 Outline ± Gate Minimization using ± Boolean Algebra, ± Karnaugh Map, and ± Quine-McCluskey ± Don’t-care cases
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3 Gate Minimization ± To implement the logic circuit with lowest cost ± Reduce the no. of product terms & no. of literals ± How to measure the simplicity of a logic circuit? ± Literal cost ± Simple to evaluate ± To count the number of literal appearances in the Boolean function
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4 Example: Literal Cost f 1 a b d c e f 2 a b d c e c f 1 = ab + c ( d + e ) f 2 = ab + cd + ce 5 literals appearance (simplest in terms of literal cost) 6 literals appearance
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5 Not Accurate in Some Cases e.g. compare these two implementation ± SOP: g 1 = abcd + a’b’c’d’ ± POS: g 2 = ( a’ + b )( b’ + c )( c’ + d )( d’ + a ) ± g 1 and g 2 both have 8 literal cost (same cost?) ± To capture the difference illustrated, introduce another cost criteria: gate-input cost and gate cost
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6 Gate-input Cost, Gate Cost ± Gate-input Cost ± The number of inputs to the gates in the implementation ± Gate Cost ± The number of gates in the implementation ± Total cost = Gate cost + Gate-input cost ± Can be determined easily by looking at the logic diagram
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7 No. of gates + No. of gate inputs ± g 1 has 2 AND gates, 1 OR gate, 4 NOT gates and 14 gate inputs ± Total cost = 21 ± g 2 has 4 OR gates, 1 AND gate, 4 NOT gates and 16 gate inputs ± Total cost = 25 ± So g 1 has lower cost than g 2
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8 Why Gate-input Cost Better? ± When the number of levels increases, literal cost represents a smaller proportion of the actual circuit cost ± Use literal cost for estimation only ± The no. of gate-input proportional to the no. of transistors and wires used in a logic circuit ± A good measure for cost of the logic circuits
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9 SOP Always Better Than POS? ± In previous example, g 1 (SOP) has lower cost than g 2 (POS). Is it SOP always superior than POS? ± Let’s see this example: ± SOP: f 1 = ab’ + ad’ + ac’ + a’bd ± POS: f 2 = ( a + b )( a+ ±d )( a’ + b’ + c’ + d’ ) ± Which one has lower cost? ± f 1 = 9 gates + 17 inputs = 26 ± f 2 = 8 gates + 15 inputs = 23
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10 Unique? ± Simplest expression is not necessarily unique ± There may be two or more expressions have the same cost ± That means either solution is satisfactory
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11 Simplifying Logic Circuits ± Boolean algebra is a useful tool for simplifying logic circuits ± e.g. we can simplify f = x’yz + x’yz’ + xz using the previous mentioned properties ± f = x’yz + x’yz’ + xz ± = x’y ( z+ ±z ) + xz (distributive) ± = x’y (1) + xz (complement) ± = x’y + xz (identity) The expression is reduced to 2 terms only! one step approach: x’yz + x’yz’ = x’y (adjacency)
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12 The Meaning of Simplification f x y z x’ z’ z y f x y z x’ z y x x’ y z x 6 gates, 13 inputs 4 gates, 7 inputs Both circuits have the same output for all possible binary combinations of the 3 input variables, but the second one requires fewer gates, fewer gate inputs (i.e. fewer components)
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13 Reduce Terms & Literals ± The complexity of a logic circuit is directly related to the Boolean function ±
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03 Minimization of Logic Function - EE2000 Logic Circuit...

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