UNIVERSITY OF CALIFORNIA, BERKELEY
College of Engineering
Department of Electrical Engineering and Computer Sciences
Elad Alon
Homework #2  Solutions
EECS141
Due Thursday, September 10, 5pm, box in 240 Cory
PROBLEM 1: VTC
In this problem we will analyze the noise margins for a chain of gates,
Fig. 1a.
The VTC has four segments, where the two curved regions can be approximated
as quarter ellipses.
a)
Add the DC voltage sources to Figure 1.a. that you would use for modeling noise
coupling to the input and output of gate
M
2
.
You should arrange these voltage
sources so that they would both impact the noise margin in the same way (i.e., if
the voltage source at the input decreases the noise margin, the voltage source at
the output should also decrease the noise margin).
Solution:
b)
Determine the noise margins (as defined in lecture) for gate
M
2
when noise
couples only to its input.
We want a numerical answer in Volts, not one based on
just looking at the VTC.
Figure 1.a.
Figure 1.b.
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Solution:
To find the noise margin, we need to know
V
IL
,
V
IH
,
V
OL
, and
V
OH
for the
inverters.
V
OH
and
V
OL
are clear from the VTC:
V
OH
=
1.2
V
,
V
OL
=
0
V
To find
V
IL
and
V
IH
, we need to find the unitygain points on the VTC.
To find
these points, we’ll need the equations for the VTC in the regions 0.2V
≤
V
in
≤
0.6V and 0.6V
≤
V
in
≤
1.0V.
For 0.2V
≤
V
in
≤
0.6V, knowing that the curve is part of an ellipse, we have:
(
x
−
0.2)
2
0.4
2
+
(
y
−
0.4)
2
0.8
2
=
1
.
To find the point of unity gain, we take the derivative (with respect to
x
) of the
above equation while keeping in mind that at the point we are looking
for
∂
y
/
∂
x
= −
1
.
Therefore:
2
0.4
2
(
x
−
0.2)
−
2
0.8
2
(
y
−
0.4)
=
0
, or
y
=
4
x
−
0.4
.
Now we plug this linear equation into the equation for the ellipse and we get the
solution:
x
≈
0.38
.
So,
V
IL
≈
0.38
V
.
Since the second ellipse is actually just a quarter circle, finding its unity gain
point is much easier.
The quarter circle has a radius of 0.4V with its origin at
(V
in
=1V, V
out
= 0.4V), and so the point on the 135 degree line away from the
origin (which corresponds to the point with
∂
y
/
∂
x
= −
1
) is at:
V
IH
=
1
−
0.4 /
2
≈
0.72
V
.
Finally:
NM
H
= 1.2V – 0.72V = 0.48V
NM
L
= 0.38V – 0.0V = 0.38V
c)
Are the gates M4 and M5, whose VTCs are shown below in Figures 1.c and 1.d,
digital?
Is the cascade of the two gates (Figure 1.e) digital? Why or why not?
As
part of your answer, you should sketch the VTC of the cascade of the two gates.
Solution:
M5 is clearly a digital gate, but M4 is a little trickier.
M4 is “marginally” digital:
it has V
OL
= 0.6V, V
OH
= 1.2V, V
IL
= 0.6V, and V
IH
= 0.9V.
In other words, the
circuit has zero NM
L
, but nonetheless the gate is regenerative.
Interestingly, despite the fact that both M4 and M5 are digital, the cascade of the
two gates is not
digital.
The easiest way to prove this is to notice that for the VTC
traced out by the cascade of the two gates, V
M
< V
IL
. This means that the output
of a cascade of two such “gates” (where each gate is composed of the cascade of
Figure 1.e.
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 Spring '08
 Staff
 Direct Current, Input/output, NMOS logic

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