lecture10 - 1 ECE520 – Lecture 10 Slide: 1 University of...

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Unformatted text preview: 1 ECE520 – Lecture 10 Slide: 1 University of New Mexico Office: ECE Bldg. 230B Office hours: Tuesday 2:00-3:00PM or by appointment E-mail: [email protected] Prof. Payman Zarkesh-Ha ECE520 – VLSI Design Lecture 10: L-Edit Demo and Layout Techniques ECE520 – Lecture 10 Slide: 2 University of New Mexico Review of Last Lecture Overview of Design Rules ● What are design rules? ● Why have design rules? ● Typical design rules 2 ECE520 – Lecture 10 Slide: 3 University of New Mexico Today’s Lecture L-Edit Demo Layout Techniques ● Design for density ● Design for performance ● Design for reliability ECE520 – Lecture 10 Slide: 4 University of New Mexico Control (Random Logic) Memory Cells (Structural) An Example of Layout 3 ECE520 – Lecture 10 Slide: 5 University of New Mexico Good Layout Characteristics Density ● Cells pack together well ● Cells are routable—think about how they will fit together before starting! ● Start with paper diagram first Performance ● Keep capacitances low (specially diffusion cap) ● Keep interconnects short Reliability ● Poor layout can greatly affect the circuit reliability ● Use proper wire width for power rails (IR drop, electromigration) Final Checks ● Layout must match the circuit being built (LVS) ● Layout must meet the manufacturing design rules (DRC) ECE520 – Lecture 10 Slide: 6 University of New Mexico An Example of A Bad Layout Not dense Long poly route (large parasitic resistance) Narrow power rails 4 ECE520 – Lecture 10...
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This note was uploaded on 01/11/2011 for the course ECE 520 taught by Professor Zarkesh-ha,p during the Fall '08 term at New Mexico.

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lecture10 - 1 ECE520 – Lecture 10 Slide: 1 University of...

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