lecture16 - ECE520 VLSI Design Lecture 16: Adders Payman...

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1 ECE520 – Lecture 16 Slide: 1 University of New Mexico Office: ECE Bldg. 230B Office hours: Tuesday 2:00-3:00PM or by appointment E-mail: payman@ece.unm.edu Payman Zarkesh-Ha ECE520 – VLSI Design Lecture 16: Adders ECE520 – Lecture 16 Slide: 2 University of New Mexico Review of Last Lecture Dynamic Logic Advantages of dynamic logic Problems of dynamic logic Fixes to problems in dynamic logic
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2 ECE520 – Lecture 16 Slide: 3 University of New Mexico Today’s Lecture Adders: A Basic Arithmetic Building Block Ripple-Carry Adder Mirror Adder Transmission Gate Adder Carry Bypass Adder Carry-Select Adder Carry Lookahead Adder ECE520 – Lecture 16 Slide: 4 University of New Mexico Design of Adders These are the heart of an ALU They are often on a critical path ; i.e. a speed limiting timing path This is a broad topic and still the subject of ongoing research Consequently, we’ll only cover the basic types Bit 3 Bit 2 Bit 1 Bit 0 Register Adder Shifter Multiplexer Data-In Data-Out
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3 ECE520 – Lecture 16 Slide: 5 University of New Mexico Truth Table for a Full Adder AB Cout Sum Cin Full adder SABC i  = A =B C i ABC i i i +++ C o BC i AC i ++ = ECE520 – Lecture 16 Slide: 6 University of New Mexico Definition of: Generate, Propagate, and Delete We define three new variables which ONLY depend on A, B Generate (G) = AB Propagate (P) = A B Delete = A B Can also derive expressions for S and C o based on D and P
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4 ECE520 – Lecture 16 Slide: 7 University of New Mexico Ripple Carry Adder Each bit looks at the preceding carry out and its inputs The delay of the adder is linear with the number of bits Each bit is a delay stage since it waits for the preceding bit carry result FA FA FA FA A 0 B 0 S 0 A 1 B 1 S 1 A 2 B 2 S 2 A 3 B 3 S 3 C i ,0
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This note was uploaded on 01/11/2011 for the course ECE 520 taught by Professor Zarkesh-ha,p during the Fall '08 term at New Mexico.

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lecture16 - ECE520 VLSI Design Lecture 16: Adders Payman...

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