Dale - Computer Science Illuminated 125

Dale - Computer Science Illuminated 125 - again V 1 and V 2...

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98 Chapter 4 Gates and Circuits Figure 4.9 Constructing gates using transistors Source Ground Ground Source Ground V 1 1 2 2 Source NOR gate NAND gate NOT gate Ground in out out out source is grounded, and the output signal V out is low. If V in is low, the source is not grounded, and V out is high. Thus the input signal is inverted, which is exactly what a NOT gate does. The NAND gate requires two transistors. The input signals V 1 and V 2 represent the input to the NAND gate. If both input signals are high, the source is grounded and the output V out is low. But if either input signal is low, one transistor or the other keep the source signal from being grounded and the output is high. Therefore, if V 1 , or V 2 , or both, carry a low signal (binary 0), the output is a 1. This is consistent with the processing of a NAND gate. The construction of a NOR gate also requires two transistors. Once
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Unformatted text preview: again, V 1 and V 2 represent the input to the gate. This time, however, the transistors are not connected in series. The source connects to each tran-sistor separately. If either transistor allows the source signal to be grounded, the output is 0. Therefore, the output is high (binary 1) only when both V 1 and V 2 are low (binary 0), which is what we want for a NOR gate. An AND gate, as we pointed out earlier in this chapter, produces output that is exactly opposite of the NAND gate. Therefore, to construct an AND gate we simply pass the output of a NAND gate through an inverter (or NOT gate). That’s why AND gates are more complicated to construct than NAND gates: They require three transistors, two for the NAND and...
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This note was uploaded on 01/13/2011 for the course CSE 1550 taught by Professor Marianakant during the Fall '10 term at York University.

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