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Unformatted text preview: output from the mux. The following truth table shows how the input control lines determine the output for this multiplexer: The block diagram in Figure 4.11 hides a fairly complicated circuit to carry out the logic of a multiplexer. Such a circuit could be shown using eight three-input AND gates and one eight-input OR gate. We wont get into the details of the circuit in this book. A multiplexer can be designed with various numbers of input lines and corresponding control lines. In general, the binary values on n input control lines are used to determine which of 2 n other data lines are selected for output. S0 1 1 1 1 S1 1 1 1 1 S2 1 1 1 1 F D0 D1 D2 D3 D4 D5 D6 D7...
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This note was uploaded on 01/13/2011 for the course CSE 1550 taught by Professor Marianakant during the Fall '10 term at York University.
- Fall '10