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Unformatted text preview: results of operations; these are the special storage registers referred in Chapter 5 in the discussion of the ALU. We realize that this is a lot of detailed information, but dont despair! Remember that our goal is to give you a feel for what is actually happening at the lowest level of computer processing. By necessity, that processing keeps track of many details. Figure 7.1 shows a diagram of Pep/7s CPU and memory. Notice that the addresses in memory are in red. This color is to emphasize that the addresses Figure 7.1 Pep/7s architecture A register (accumulator) Pep/7's CPU X register Program counter (CP) Instruction register (IR) 0000 Pep/7's Memory 0001 0002 0FFE . . 0FFF...
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This note was uploaded on 01/13/2011 for the course CSE 1550 taught by Professor Marianakant during the Fall '10 term at York University.
- Fall '10