Lab1 - CS M152B Lab 1 ALU Design Register File Introduction The purpose of this project is twofold(1 to introduce you to the software tools

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CS M152B - Lab 1 ALU Design – Register File Introduction The purpose of this project is twofold: (1) to introduce you to the software tools provided by the Xilinx Integrated Software Environment, or ISE; and (2) to introduce you to the basic concepts of writing VHDL. Since most of you are probably new to both, we will guide you through most of this project step-by-step. Of course, since this is a class, there will be parts that you will be required to do on your own, so be sure to read the references listed at the end of this handout before you begin. In this project, you are asked to design and implement a 1-bit asynchronous ALU, as described in Section 4.5 of [1]. For your convenience, the schematic has been provided below. Note that this ALU is the same as the one found in Figure 4.16 on p.236 of [1], so it may be helpful to review any relevant material in the textbook before you begin. Also, if you haven’t done so already, be sure to read the VHDL primer found at [2] before proceeding to the next section. Note: Since this project is relatively easy, you may decide to work together as a group or work on different parts individually; either way is acceptable and is up to you. However, if you do decide to split up the work, keep in mind that you should know how to design every component, even if you are not actually working on it. Please ensure that everyone is doing their fair share of the work.
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Getting Started The Xilinx Integrated Software Environment (ISE) provides users with a collection of tools to create, implement, and simulate a design onto a Xilinx programmable device. To gain access to these tools, start by opening the Project Navigator application. Project Navigator is simply an interface that provides users with easy “pushbutton” access to all of the Xilinx ISE tools mentioned above. 1. Double-click the Project Navigator icon on your desktop. 2. In Project Navigator, select File New Project .
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3. Enter the name and location of your project in the appropriate boxes and select the type of top- level module for your design. You can name the project anything you want, but it should be located in your own user directory. Select “VHDL” and click Next . 4. Select the device family, device, package, and speed grade as indicated below. Click Next to continue.
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5. ISE gives us the option to create new source files, but we can ignore this for now. We can create new sources at any time once the project files have been created. Click Next . 6. Similarly, we can add existing source files to our project if desired. Again, this step is optional, as sources can be added at any time after the project has been created. Click Next to continue.
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7. The last dialog box provides a summary of all the options you selected. Check to make sure they are correct, and click Finish to generate the required project files. We have now created a “project1.npl” file in the directory you specified in the first dialog box.
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This note was uploaded on 01/14/2011 for the course CS 152 taught by Professor Staff during the Fall '98 term at UCLA.

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Lab1 - CS M152B Lab 1 ALU Design Register File Introduction The purpose of this project is twofold(1 to introduce you to the software tools

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