PowerPC - Interfacing the P-P-PowerPC processor with the...

Info iconThis preview shows pages 1–3. Sign up to view the full content.

View Full Document Right Arrow Icon

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
This is the end of the preview. Sign up to access the rest of the document.

Unformatted text preview: Interfacing the P-P-PowerPC processor with the Virtex 2 Pro Dan Hirsch November 4, 2008 1 Target Convert the video decoder sample code to do something interesting; namely, to invert the display when the lens is covered, using the PowerPC processor. 2 Requirements • XUPV2P board • Xilinx EDK, 8.2i or Higher • Video Decoder demo code 3 Overview In order to design this, we will have modify the video decoder module to report the brightness on an output port, and take a value to XOR with the output on an input port. The processor, in turn will adjust the XOR value based on the brightness levels. For each of the following steps, I will give instructions both for using XPS (The Xilinx Platform Studio), and a simple text editor. I prefer the latter (especially with Emacs 1 ; its VHDL mode is quite a treat if you’re used to ISE’s editor), but others may differ. 4 Changes to Hardware We will first edit the file video capture.vhd . In XPS, this can be done by right clicking on the video capture 0 module, and selecting “Browse HDL sources”. Alternatively, if you prefer a standard text editor, simply open the file pcores/video capture v1 01 b/hdl/vhdl/video capture.vhd . 1 Visit http://ntemacs.sf.net to download your copy today! 1 First, we need to add two ports for the average brightness and the input xor value. Thus, add these to lines to the PORTS section: AVGBRIGHT : out std_logic_vector(7 downto 0); XORVAL : in std_logic_vector(7 downto 0); Next, we hook up the brightness circuitry. To do this, we add a signal to the architecture: signal pix_brightness : std_logic_vector(7 downto 0); We also modify the output process, according to this “diff” 2 : PROCESS (clk_27, rst, read_enable_lb0) + variable Rout, Gout, Bout : std_logic_vector(7 downto 0); + variable brightness_tmp, btmp2 : std_logic_vector(9 downto 0); + variable txor : std_logic_vector(7 downto 0); BEGIN IF (rst = ’1’) THEN R(7 DOWNTO 0) <= "00000000"; G(7 DOWNTO 0) <= "00000000"; B(7 DOWNTO 0) <= "00000000"; ELSIF (clk_27’EVENT AND clk_27 = ’1’) THEN IF (crop = ’1’) THEN- R(7 DOWNTO 0) <= "00000000";- G(7 DOWNTO 0) <= "00000000";- B(7 DOWNTO 0) <= "00000000"; + Rout(7 DOWNTO 0) := "00000000"; + Gout(7 DOWNTO 0) := "00000000"; + Bout(7 DOWNTO 0) := "00000000"; ELSE if (read_enable_lb0 = ’1’) THEN- R(7 DOWNTO 0) <= read_red_data_lb0(7 DOWNTO 0);- G(7 DOWNTO 0) <= read_green_data_lb0(7 DOWNTO 0);...
View Full Document

This note was uploaded on 01/14/2011 for the course CS 152 taught by Professor Staff during the Fall '98 term at UCLA.

Page1 / 7

PowerPC - Interfacing the P-P-PowerPC processor with the...

This preview shows document pages 1 - 3. Sign up to view the full document.

View Full Document Right Arrow Icon
Ask a homework question - tutors are online