Lecture 01-Long Channel MOS Model

Lecture 01-Long Channel MOS Model - EE214 Analog Integrated...

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EE 214 Lecture 1 (HO#2) B. Murmann 1 EE214 Analog Integrated Circuit Design Boris Murmann Stanford University murmann@stanford.edu Copyright © 2004 by Boris Murmann
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EE 214 Lecture 1 (HO#2) B. Murmann 2 A Few Words About Your Instructor New Assistant Professor in EE PhD, UC Berkeley 2003 – Digitally assisted A/D conversion – Use sloppy analog circuits (low power, fast) – Correct errors using digital post-processor ~ 4 years work experience in IC industry – Mixed signal IC design, low power, high voltage Current research direction – Advanced digital correction schemes for data converters – Analog/Digital/Communication layer co-design and cross- level optimization
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EE 214 Lecture 1 (HO#2) B. Murmann 3 EE214 Basics (1) Teaching assistants – Mona Jarrahi, Jason Hu – OH hours: Tue, Wed, Thu and Sun 6-7:30 PM (CIS lounge) – Review session: Fridays1:15-2:05, Skilling 191 (Live on E3) Administrative support – Ann Guerra, CIS 207 Lectures are televised and on the web, but please come to class to keep the discussion intercative Web page: http://eeclass.stanford.edu/ee313 – Check regularly, especially FAQ section – Register for online access to grades and solutions
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EE 214 Lecture 1 (HO#2) B. Murmann 4 EE214 Basics (2) Required text Analysis and Design of Analog Integrated Circuits , 4 th Edition, Gray, Hurst, Lewis and Meyer, Wiley, 2001. Useful reference The Designer’s Guide to Spice and Spectre , Ken Kundert, Kluwer Academic Publishers, 1995. (On reserve in Engineering Library) Course prerequisites – EE101B or equivalent – Basic device physics and models • PN junctions, MOSFETs, BJTs – Basic linear systems (poles, zeros) – Please talk to me if you are not sure if you have the required background
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EE 214 Lecture 1 (HO#2) B. Murmann 5 Assignments Homework: (30%) – Handed out on Mondays, due following Monday in class – No credit for late homework – Policy for off-campus students: Fax/send before deadline stated on handout Midterm Project: (30%) – Design of an amplifier – Work individually, OK to discuss with others – No layout, just design and simulation Final Exam (40%)
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EE 214 Lecture 1 (HO#2) B. Murmann 6 Honor Code Please remember you are bound by the honor code – I will trust you not to cheat – I will try not to tempt you But if you are found cheating it is very serious – There is a formal hearing – You can be thrown out of Stanford Save yourself and me a huge hassle and be honest •F o r m o r e i n f o http://www.stanford.edu/dept/vpsa/judicialaffairs/guiding/pdf/ honorcode.pdf
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EE 214 Lecture 1 (HO#2) B. Murmann 7 Be Reasonable When Asking TAs The TAs will not give you "the answer times two"… They will also not debug your Spice deck – Figuring out what's wrong with your circuit is an essential component of this class
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Lecture 01-Long Channel MOS Model - EE214 Analog Integrated...

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