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Lecture 06-Extrinsic capacitances

Lecture 06-Extrinsic capacitances - Lecture 6 Design...

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EE 214 Lecture 6 (HO#9) B. Murmann 1 Lecture 6 Design Example 2 Extrinsic Capacitance Boris Murmann Stanford University [email protected] Copyright © 2004 by Boris Murmann
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EE 214 Lecture 6 (HO#9) B. Murmann 2 Overview Reading 1.6.7 (Parasitic Elements) 7.1, 7.2.0, 7.2.1 (Miller Effect in CS Stage, only pp. 488-493) Introduction In today's lecture, we'll look at another CS amplifier design example – this time with a more realistic input source that has finite resistance. Through this example, we find that we need more modeling to accurately predict the resulting pole at the gate node. Our discussion leads to a discussion of parasitic extrinsic capacitors around the MOSFET - overlap and junction capacitance.
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