Lect39LogicGates - Interconnection between logic gates L e c tu r e 3 9 Nonlinear circuit elements W h a t i f th e T L i s a tta c h e d to a d e

Info iconThis preview shows pages 1–11. Sign up to view the full content.

View Full Document Right Arrow Icon
Interconnection between logic gates Lecture 39
Background image of page 1

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Nonlinear circuit elements • What if the TL is attached to a “device” with a complex I-V characteristic? – Diode – Transistor – Amplifier • “Load Line” method can be used as a substitute for bounce diagrams
Background image of page 2
Example Z 0 =50 Ω z=0 z=l 50V t=0, close T=1 μ sec 200 Ω V L = 50 I L I L Source Side Load Side
Background image of page 3

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Example, t=0+ Z 0 =50 Ω z=0 z=l 50V T=1 μ sec 200 Ω V L = 50 I L I L Source Side Load Side V s I s + - V S = V + I S = I + = V + / Z 0 = V S /50 50 V = 200 I S + V S
Background image of page 4
Source Line I [A] V [V] 2 4 6 0.1 0.2 0.3 0.4 8 10 50 V = 200 I S + V S
Background image of page 5

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
I [A] V [V] 2 4 6 0.1 0.2 0.3 0.4 8 10 50 V = 200 I S + V S I S = V S /50
Background image of page 6
I [A] V [V] 2 4 6 0.1 0.2 0.3 0.4 8 10 50 V = 200 I S + V S I S = V S /50 A Point “A” is solution to V + and I +
Background image of page 7

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
t=T Z 0 =50 Ω z=0 z=l 50V T=1 μ sec 200 Ω V L = 50 I L I L Source Side Load Side V s I s + - V S = V + I S = V S /50 50 V = 200 I S + V S I L V L + - V L = 50 I L I L V L = V + + V " I L = I + + I " I L = 2 V + " V L 50 Straight Line slope = -1/50 intercept = 2V + /50
Background image of page 8
I [A] V [V] 2 4 6 0.1 0.2 0.3 0.4 8 10 50 V = 200 I S + V S Load Line V L = 50 I L I L A
Background image of page 9

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
I [A] V [V] 2 4 6 0.1 0.2 0.3 0.4 8 10 50 V = 200 I S + V S Solution for I and V at z=l at t=T is point “B” V L = 50 I L I L I L = 2 V + " V L 50 B A
Background image of page 10
Image of page 11
This is the end of the preview. Sign up to access the rest of the document.

This note was uploaded on 01/17/2011 for the course ECE 305 taught by Professor Staff during the Summer '08 term at Michigan State University.

Page1 / 17

Lect39LogicGates - Interconnection between logic gates L e c tu r e 3 9 Nonlinear circuit elements W h a t i f th e T L i s a tta c h e d to a d e

This preview shows document pages 1 - 11. Sign up to view the full document.

View Full Document Right Arrow Icon
Ask a homework question - tutors are online