Quiz13ROMTable

Quiz13ROMTable - Address Line Input Data Line Output A 2 y...

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Quiz 13 ROM Table A designer uses a PROM having 8 addresses and 4 bits per address to implement the excitation and output equations of a sequential circuit. This means that the PROM has 3 input address lines and 4 output data lines. The sequential circuit has 1 dedicated input x , 4 states, and 2 dedicated outputs z 1 and z 2 . Since the design has 4 states, it requires 2 state variables, y 1 y 2 . The designer makes the following state assignment: State y 1 y 2 A 00 B 01 C 10 D 11 In his design, the designer places the input and output variables on the address and data lines as follows:
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Unformatted text preview: Address Line Input Data Line Output A 2 y 1 D 3 y 1 + A 1 y 2 D 2 y 2 + A x D 1 z 1 D z 2 Nominally, A2 and D2 are the most significant address input and data output lines, respectively. A0 and D0 are the least significant address input and data output lines, respectively. Here is a table that indicates how the designer encoded the data for each address: Address Value Data Value A 2 A 1 A D 3 D 2 D 1 D 0 0 0 0 0 0 1 0 0 1 1 0 1 0 0 1 0 0 0 1 1 0 1 1 1 1 1 0 1 0 0 1 0 0 0 1 0 1 0 1 0 0 1 1 0 1 1 0 1 1 1 1 0 1 1 1...
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This note was uploaded on 01/17/2011 for the course ECE 3504 at Virginia Tech.

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