3_PLD_Slides - ECE ECE 3504 Digital Design I Section 3:...

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ECE 3504 Digital Design I Section 3: Programmable Logic Devices
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What You Should Already Know! The general organization of two- The general organization of two level combinational SOP circuits The general operation of flip-flops The general organization of state equations in synchronous sequential circuit sequential circuits The general operation of a shift register How to use Logic Works as a schematic capture and simulation too tool
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What is a PLD What is a PLD? The PLD programmable logic The PLD ( programmable logic device ) that we will use is a specific implementation of a PAL pb l l i ) hi ( programmable array logic ) chip. PAL chips represent a specific class of chip architectures called PLAs ( programmable logic arrays ).
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Architectural Representation You should be familiar with the You should be familiar with the representation of discrete logic gates. A B C D E F G H To represent the higher scale of integration that PLAs possess, we must use a different method of gate representation.
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Architectural Representation AB C D E F G H The diagram shows the array representation for an “8-input” AND gate AND gate. The single horizontal line represents a number of parallel inputs. The vertical lines represent possible inputs A node indicates possible inputs. A node indicates which signals are connected to the AND gate’s inputs.
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Architectural Representation In the previous gate diagram, each In the previous gate diagram, each input line contains an electronic switch. Depending on the status of the switch, the input line either is or is not acting as a gate input. Programming the chip to implement specific functions i th t t t i requires the user to set certain switches.
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Programmable Logic Arrays The quality that distinguishes The quality that distinguishes classes of PLAs is the degree to which different arrays are pb l programmable . Most PLAs implement SOP functions using AND arrays and OR arrays. A particular class of PLA may be fl l b i t l fully programmable, or it may only be partly programmable.
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Programmable Logic Arrays In a general PLA, both the AND In a general PLA, both the AND array and the OR array are programmable.
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Programmable Logic Arrays The previous array has four inputs The previous array has four inputs and three outputs. The inputs pass through an internal buffer that provides high- current complemented and uncomplemented versions of each signal. The user programs the AND array t t d t t d t h to create product terms, and the OR array to determine a particular SOP function that uses the product terms from the AND array.
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Programmable Logic Arrays The diagram shows a programmed The diagram shows a programmed PLA. Note the gate-sharing.
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3_PLD_Slides - ECE ECE 3504 Digital Design I Section 3:...

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