5d_State_Reduction_Slides

5d_State_Reduction_Slides - ECE ECE 3534 Digital Design 1...

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ECE 3534 Digital Design 1 Section 5d: State Reduction
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The Design Proces The Design Process I. Read the statement of the problem. A. Settle the requirements of the specification. B. Determine the appropriate model. II. Model the system. A Create a stat transition diagram A. Create a state-transition diagram. B. Create a state-transition table. III. Eliminate redundant states. IV. Make a state assignment. A. Apply Armstong’s method to obtain maximal adjacencies OR B. Use a one-hot code state assignment Realize the circuit V. Realize the circuit. A. Select the flip-flop type. B. Use the appropriate excitation table to derive logic equations. C. Draw the circuit diagram for the logic equations. D. Simulate the circuit to judge its effectiveness effectiveness. E. Evaluate the cost and speed of the realization.
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State Reduction We will consider the motivation for state reduction through a design example. A sequential circuit has two inputs x a and x b , and two outputs, z and z b . The bits of x and x b represent a a two unsigned binary numbers of arbitrary precision, a and b respectively. The bits of and are shifted into the sequential The bits of a and b are shifted into the sequential circuit on x a and x b in synchronicity with the system clock, higher-order bits first. At the time that the lowest-order bits are present as inputs on x a and x b , the outputs of the sequential circuit are as follows: z a = 1 if and only if a b. z b = 1 if and only if b a. x a 100111010010 x b 101001010001 a1249 1 9 3 9 01249 1 8 b125 1 0 2 0 4 1 01248 1 7 Z a 110000111111 z b 111111111100
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State Reduction: Design Example State Diagram State Tabl State Table
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State Reduction We’ve just seen an example of two We ve just seen an example of two states being the same . Clearly, when two states are the same, we don’t d b th d f need both and can remove one of them. In doing so, we must change all references to the removed state to refer to the remaining state. S ti t t th t d t Sometimes, states that do not appear to be the same are still equivalent.
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State Reduction: Notation δ (A, x 1 ) = B “The next state of state A for input combintion x 1 is B.” A is the present state . x 1 is a combination of the inputs. B is the next state . This notation applies to Mealy and Moore machines. λ (A, x 1 ) = z “The output of state A for input combination x 1 is z .” A is the present state . x 1 is a combination of the inputs. z is a Mealy output .
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This note was uploaded on 01/17/2011 for the course ECE 3504 at Virginia Tech.

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5d_State_Reduction_Slides - ECE ECE 3534 Digital Design 1...

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