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5d_State_Reduction_Slides

5d_State_Reduction_Slides - ECE ECE 3534 Digital Design 1...

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ECE 3534 Digital Design 1 Section 5d: State Reduction
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The Design Process I. Read the statement of the problem. A. Settle the requirements of the specification. B. Determine the appropriate model. II. Model the system. A Create a state transition diagram A. Create a state-transition diagram. B. Create a state-transition table. III. Eliminate redundant states. IV. Make a state assignment. A. Apply Armstong’s method to obtain maximal adjacencies OR B. Use a one-hot code state assignment V Realize the circuit V. Realize the circuit. A. Select the flip-flop type. B. Use the appropriate excitation table to derive logic equations. C. Draw the circuit diagram for the logic equations. D. Simulate the circuit to judge its effectiveness effectiveness. E. Evaluate the cost and speed of the realization.
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State Reduction We will consider the motivation for state reduction through a design example. A sequential circuit has two inputs x a and x b , and two outputs, z a and z b . The bits of x a and x b represent two unsigned binary numbers of arbitrary precision, a and b respectively. The bits of a and b are shifted into the sequential circuit on x a and x b in synchronicity with the system clock, higher-order bits first. At the time that the lowest-order bits are present as inputs on x a and x b , h f h l f ll the outputs of the sequential circuit are as follows: z a = 1 if and only if a b. z b = 1 if and only if b a. x a 1 0 0 1 1 1 0 1 0 0 1 0 x b 1 0 1 0 0 1 0 1 0 0 0 1 a 1 2 4 9 19 39 0 1 2 4 9 18 b 1 2 5 10 20 41 0 1 2 4 8 17 Z a 1 1 0 0 0 0 1 1 1 1 1 1 z b 1 1 1 1 1 1 1 1 1 1 0 0
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