Counter Design 1

# Counter Design 1 - Problem 1 Design a 2-bit standard up counter That is a state machine that cycles through the 10 11 Design Process Generally

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Problem 1 Design a 2-bit standard up counter. That is, a state machine that cycles through the states 00, 01, 10, 11. Design Process Generally speaking, the process of sequential design begins with the creation of a state diagram that describes the state machine given in the specification. We have already seen how to create a state diagram from the information that is contained in this specification. However, since the number of states in this state machine is known, and the order of states is easily determined from the specification, the designer can proceed to the state table without creating a diagram. Step 1: Arrange the present states. Since a state table is a form of a truth table, we can begin by organizing the present state information. This step is quite simple, as we just have to put the information into the section labeled as “Present State.” Conceivably, the information could be arranged in any order, but we want to work with this as a truth table as much as possible. We might show the information as indicated below. Present State Next State SR inputs D inputs JK inputs T inputs A B A + B + S A R A S B R B D A D B J A K A J B K B T A T B 0 0 0 1 1 0 1 1 The truth table shown is very wide, because we are going to carry out the design for all four flip-flop types. Step 2: Arrange the next states. Without a state diagram, we will have to rely on the specification to provide the next state information. Fortunately, the specification is clear on how the states progress. Based on the information given, we can fill in the known next state information into that section of the state table. Present State Next State SR inputs D inputs JK inputs T inputs A B A + B + S A R A S B R B D A D B J A K A J B K B T A T B 0 0 0 1 0 1 1 0 1 0 1 1 1 1 0 0 In looking at each present state (AB) and the next state that follows it (A + B + ), the progression of states as described in the specification (00 – 01 – 10 – 11) should be apparent. In each case, when a given state is considered as the present state, then the state immediately following it must be the next state of the present state

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## This note was uploaded on 01/17/2011 for the course ECE 3504 at Virginia Tech.

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Counter Design 1 - Problem 1 Design a 2-bit standard up counter That is a state machine that cycles through the 10 11 Design Process Generally

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