7213
CHAPTER 7
7.1
K
n
'
=
m
n
C
ox
"
=
m
n
e
ox
T
ox
=
m
n
3.9
e
o
T
ox
=
500
cm
2
V

sec
3.9
(
29
8.854
x
10

14
F
/
cm
(
29
16
x
10

9
m
100
cm
/
m
(
29
K
n
'
=
108
x
10

6
F
V

sec
=
108
x
10

6
A
V
2
=
108
m
A
V
2
K
p
'
=
m
p
C
ox
"
=
m
p
m
n
K
n
'
=
200
500
108
m
A
V
2
=
43.2
m
A
V
2
7.2
p+
ntype
substrate
p+
n+
n+
v
I
v
o
V
(5 V)
DD
pwell
p+
NMOS transistor
PMOS transistor
n+
V
(0 V)
SS
B
S
D
D
S
B
Ohmic
contact
Ohmic
contact
7.3
a
( 29
I
=
I
S
A
=
500
pA
cm
2
1
cm
x
0.5
cm
(
29
=
250
pA
b
( 29
I
=
I
S
A
+
5
x
10
6
(
29
100
pA
cm
2
4
x
10

4
cm
(
29
10
x
10

4
cm
(
29
=
250
+
200
=
450
pA
c
( 29
Same as b
( 29
7.4
C
=
3
e
ox
A
t
ox
=
3
3.9
e
o
LW
t
ox
=
3
3.9 8.854
x
10

14
F
cm
5
mm
2
0.1
cm
mm
2
m
m
(
29
1
m
m
=
0.518
pF
7.5
(a) V
H
= 3.3 V, V
L
= 0 V
(b) V
H
= 2.5 V, V
L
= 0 V
7.6
(a) V
H
= 3.3 V, V
L
= 0 V
(b) Same as (a). V
H
and V
L
don't depend upon W/L in a CMOS gate.
7.7
(a) V
H
= 2.5 V, V
L
= 0 V
(b) Same as (a). V
H
and V
L
don't depend upon W/L in a CMOS gate.
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7.8
a
( 29
V
H
=
3.3
V

V
L
=
0
V

For M
N
, V
GS
=
0, so M
N
is cut off.
For M
P
, V
GS
= 
3.3, V
DS
= 0V and V
TP
= 0.75V. For V
DS
V
GS
V
TP
, M
P
is in the triode region.
b
( 29
For M
N
, V
GS
=
3.3, V
DS
= 0V and V
TN
= 0.75V.
For V
DS
<
V
GS
V
TN
, M
N
is in the triode region.
For M
P
, V
GS
=
0, so M
P
is cut off.
c
( 29
For M
N
, V
GS
=
1.65, V
DS
=1.65 V and V
TN
= 0.75V.
For V
DS
V
GS
V
TN
, M
N
is saturated.
For M
P
, V
GS
= 
1.65, V
DS
= 1.65V and V
TP
= 0.75V.
For V
DS
<
V
GS
V
TP
, so M
P
is saturated.
7.9
a
( 29
V
H
=
2.5
V

V
L
=
0
V

For M
N
, V
GS
=
0, so M
N
is cut off.
For M
P
, V
GS
=
2.5, V
DS
= 0V and V
TP
= 0.60V. For V
DS
V
GS
 V
TP
, M
P
is in the triode region.
b
( 29
For M
N
, V
GS
=
2.5, V
DS
= 0V and V
TN
= 0.60V.
For V
DS
<
V
GS
 V
TN
, M
N
is in the triode region.
For M
P
, V
GS
=
0, so M
P
is cut off.
c
( 29
For M
N
, V
GS
=
1.25, V
DS
=1.25 V and V
TN
= 0.60V.
For V
DS
V
GS
V
TN
, M
N
is saturated.
For M
P
, V
GS
=
1.25, V
DS
=1.25V and V
TP
=0.75V.
For V
DS
<
V
GS
 V
TP
, so M
P
is saturated.
7.10
(a) V
H
= 0 V, V
L
= 5.2 V
(b) Same as (a). V
H
and V
L
don't depend upon W/L in a CMOS gate.
7.11
For v
I
= v
O
, both transistors will be saturated since v
GS
= v
DS
for each device.
Equating the drain currents
with K
n
= K
p
yields:
a
( 29
Both transistors are saturated with V
DS
= V
GS
K
n
2
v
I

V
TN
(
29
2
=
K
p
2
v
I

V
DD

V
TP
(
29
2
and
v
I

V
TN
=
V
DD

v
I
+
V
TP
v
O
=
v
I
=
V
DD
+
V
TN
+
V
TP
2
=
5
+
1

1
2
=
2.5
V
b
( 29
I
DN
=
K
n
2
v
I

V
TN
(
29
2
=
25
m
A
2
2
1
2.5

1
(
29
2
=
56.3
m
A
(c) For K
n
= 2.5 K
p
,
2.5
K
p
2
v
I

V
TN
(
29
2
=
K
p
2
v
I

V
DD

V
TP
(
29
2
and
1.58
v
I

V
TN
(
29
=
V
DD

v
I
+
V
TP
v
O
=
v
I
=
V
DD
+
1.58
V
TN
+
V
TP
2.58
=
5
+
1.58 1
( 29
+ 
1
( 29
2.58
=
2.163
V
d
( 29
I
DN
=
25
m
A
2
2
1
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 Fall '07
 HAMBLEN
 Trigraph, VTN, W=4U L=2U AS=16P, L=2U AS=16P AD=16P

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