ee488_IO_2 - Northwestern Polytechnic University EE488...

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N orthwestern P olytechnic U niversity EE488 Lecture Notes Input/Output (System Bus)
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What is a bus? EE488 - NPU Like a “ highway ” that many people (components) can use. The highway (bus) can only support two users at any time. (1 master and 1 slave, more on this later…) The bus is physically a bunch of wires . The wires are a collection of… Æ Data signals Æ Address signals Æ Control signals
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A Bus is… EE488 - NPU A shared communication link. A common set of wires used to connect Multiple subsystems. Buses are typically named for the function they provide. (i.e. memory bus, I/O bus, local bus, IDE bus...) Registers ALU Bus controller Memory disk modem printer Memory bus I/O bus CPU Internal CPU buses
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Bus Types EE488 - NPU Computers have several types of busses (1) General purpose I/O bus - I.e. PCI Bus - lot’s of different types of devices use this bus. - Cost effective. - Performance is a compromise - 32-bit, 33MHz = 133MB/s (2) Special High-Speed busses - I.e. AGP (Advanced Graphics Port) - Only Typically only one device can connect - Optimized for high performance - 32-bit, 66MHz = 266MB/s (3) Low cost Serial busses - I.e. USB bus - Cost effective bus adding low speed devices * printers, scanners, mice, etc… - Serial bus = 1.5MB/s
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System Buses Overview EE488 - NPU South Bridge North Bridge
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What’s inside the north bridge chip?
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What’s inside the south bridge chip? There’s even more... not shown due to space
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Modern Computer System EE488 - NPU
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Advantages of Buses EE488 - NPU System bus Versatility (expandability): Æ New devices can be easily added. Æ Peripherals can be moved between computer systems that use the same bus standards. Significant Cost Benefits : Æ A single set of wires can be shared in multiple ways. Æ Common standards allow many people to design peripherals that can work in the bus. CPU memory I/O device I/O device I/O device
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Disadvantages of Buses EE488 - NPU System bus Creates communication Bottleneck : Æ The bandwidth of the bus can limit the maximum I/O throughput. Æ Busses are designed to meet the needs of many, thus, sacrifice performance for flexibility. Maximum Bus Speed is Largely Limited by Æ Length of bus Æ number of devices on the bus Æ Need to support a wide range of devices with… - varying latencies. - varying data transfer rates. CPU memory I/O device I/O device I/O device
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A Closer Look at a Bus… EE488 - NPU (Local Bus) (System Bus) CPU bridge A B C D E address address control data data control 0030h 0040h 0050h 0010h 0020h Busses typically composed of 3-different functions... (1) Address Bus : Contains address of device involved in the current communications. (2) Control Bus : Indicates details about the current bus cycle. (Read, Write, etc…) (3) Data Bus : All data is transferred on this bus.
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Shared I/O Bus EE488 - NPU (Local Bus) CPU bridge A B C D E (System I/O Bus) address control Address/Data data control Shared I/O busses are also very common ( PCI Bus ) First cycle the bus is used to transmit address information Second cycle the bus transfers the data Save cost on number of wires, board space, etc...
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