ee270_syl_Fall 06

ee270_syl_Fall 06 - EE 270 Fall 2006 San Jose State...

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EE 270 Fall 2006 Page 1 San Jose State University Department of Electrical Engineering Course Title: Advanced Logic Design Meeting: MW 19:00 - 20:15, Clark 229 Lab Open Lab, E 389 Instructor: Dr. Tri Caohuu, ENG 375 Email: caohuut@email.sjsu.edu Tel: (408) 924 3951 Course Outline: This course presents principles and techniques in logic design: design and analysis of combinational logic circuit; flip-flop properties, sequential circuit analysis and synthesis, algorithmic state machines; asynchronous circuit design and analysis; and design for testability. The students are required to do exercises and a design project in the open laboratory using HDL-based methodology. The course is intended for senior students and beginning graduate student in the digital design concentration. Ref. Text: 1. Digital Principles and Design, Donald Givone McGrawHill 2003 2. Digital Logic Circuit Analysis and Design, V. P. Nelson, H. T. Nagle, B. D. Carroll, J. D. Irwin, H Prentice Hall 1995 3. Contemporary Logic Design, Randy h. Katz and Gaetano Borriello, Prentice hall 2005 4. Asynchronous Circuit Design, Chris J. Myers, Prentice Hall 2001 Grading policy:
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ee270_syl_Fall 06 - EE 270 Fall 2006 San Jose State...

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