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Lecture_5 - ECE 331 Digital System Design Power Dissipation...

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ECE 331 – Digital System Design Power Dissipation and Propagation Delay
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ECE 331 - Digital System Design 2 Power Dissipation
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ECE 331 - Digital System Design 3 Power Consumption Each integrated circuit (IC) consumes power P T = P S + P D P T = total power consumed by IC P S = static or quiescent power consumption P D = dynamic power consumption
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ECE 331 - Digital System Design 4 Static Power Consumption Static (quiescent) power consumption P S = V CC * I CC V CC = supply voltage I CC = quiescent supply current P S = static power consumption I CC and V CC are specified in the datasheet for integrated circuit (IC). P S for CMOS devices is very small
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ECE 331 - Digital System Design 5 (see datasheet for 74LS00)
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ECE 331 - Digital System Design 6 Static Power Consumption Example: 74LS00 (Quad 2-input NAND) Supply voltage 4.75 V <= VCC <= 5.25 V Supply current High output: I CCmax = 1.6 mA Low output: I CCmax = 4.4 mA Maximum static power consumption High output: P S = 8.4 mW Low output: P S = 23.1 mW
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ECE 331 - Digital System Design 7 Static Power Consumption Example: (continued) Duty Cycle Clock signal typically has 50% duty cycle P S = P S_high * t high + P S_low * t low P S_high = 8.4 mW P S_low = 23.1 mW Assume 50% duty cycle (high / low half the time) P S = 8.4 mW * 0.5 + 23.1 mW * 0.5 = 15.8 mW Assume 60% duty cycle (high 60% of the time) PS = 8.4 mW * 0.6 + 23.1 mW * 0.4 = 14.28 mW
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ECE 331 - Digital System Design 8 Dynamic Power Consumption TTL P D ~= 0 W CMOS P D != 0 W Movement of charge into and out of device capacitances used to determine dynamic power consumption.
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ECE 331 - Digital System Design 9 Dynamic Power Consumption CMOS
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