Lecture_9 - ECE 331 Digital System Design Logic Circuit...

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ECE 331 – Digital System Design Logic Circuit Design and Analysis
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Logic Circuit Design using NAND and NOR Gates
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Logic Gates AND and OR Gates - 2-input gates realized with 6 CMOS transistors - 3-input gates realized with 8 CMOS transistors NAND and NOR Gates - 2-input gates realized with 4 CMOS transistors - 3-input gates realized with 6 CMOS transistors Therefore, it is more cost efficient to design logic circuits from NAND and NOR gates.
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“Redrawing” the NAND Gate x 1 x 2 x 1 x 2 x 1 x 2 x 1 x 2 x 1 x 2 + = (a) Inverter (NOT gate) Remember, this is an application of DeMorgan's Theorem bubble denotes inversion
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“Redrawing” the NOR Gate Inverter (NOT gate) Remember, this is an application of DeMorgan's Theorem bubble denotes inversion x 1 x 2 x 1 x 2 x 1 x 2 x 1 x 2 + x 1 x 2 = (b)
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SOP using NAND Gates Converting from AND-OR to NAND-NAND - Draw the AND-OR logic circuit for the SOP expression. - Add bubbles (inversion) At the output of each AND gate At the corresponding inputs of the OR gate Two bubbles on the same signal cancel (A'' = A) - All gates in the logic circuit are NAND gates Two different representations for the NAND gate 74xx08 Quad 2-input NAND Gate
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x 1 x 2 x 3 x 4 x 5 x 1 x 2 x 3 x 4 x 5 x 1 x 2 x 3 x 4 x 5 NAND Gate Realization of SOP NAND gate F = X1.X2 + X3.X4.X5 SOP Expression
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Lecture_9 - ECE 331 Digital System Design Logic Circuit...

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