Lecture_18 - ECE 331 Digital System Design Flip-Flops and...

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ECE 331 – Digital System Design Flip-Flops and Registers (Lecture #18)
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Basic Memory Elements
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Basic Memory Elements Basic Latch - A feedback connection of two NOR gates or two NAND gates, which can store one bit of information. Can be set to 1 or reset to 0. Gated Latch - A basic latch that also includes input gating and a control input signal (i.e. the clock). Flip-Flop - A storage element based on the gated latch principle, which can have its output state changed only on the edge of the controlling clock signal.
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Master-Slave Flip-Flop
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D Q Q Master Slave D Clock Q Q D Q Q Q m Q s D Clock Q m Q Q s = (a) Circuit (b) Timing diagram Clk Clk Master active Slave active
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Positive Edge-triggered Flip-Flop
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D Clock P4 P3 P1 P2 5 6 1 2 3 (a) Circuit D Q Q (b) Graphical symbol Clock Q Q 4
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Comparison of Level-Sensitive and Edge-Triggered memory elements
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D Clock Q a Q b D Q Q (b) Timing diagram D Q Q D Q Q D Clock Q a Q b Q c Q c Q b Q a (a) Circuit Clk Q c Gated D Latch Edge-triggered D Flip-Flop
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Lecture_18 - ECE 331 Digital System Design Flip-Flops and...

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