Common Architecture for Decoding Turbo and LDPC Codes

Common Architecture for Decoding Turbo and LDPC Codes -...

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Unformatted text preview: Common Architecture for Decoding Turbo and LDPC Codes T. S. V. Gautham, Andrew Thangaraj, Devendra Jalihal Department of Electrical Engineering, Indian Institute of Technology Madras, Chennai, India 600036. Email: [email protected]; andrew,[email protected] Abstract —Turbo codes and Low Density Parity Check (LDPC) codes have been shown to be practical codes that can approach Shannon capacity in several communication systems. In terms of performance and implementation complexity, LDPC codes and turbo codes are highly comparable, especially at coding rates around 1/2. In many recent wireless standards such as 3GPP LTE and WiMax, both turbo and LDPC codes have been recommended at the encoder. However, the decoder for turbo codes involves trellises and the BCJR algorithm, while the decoder for LDPC codes uses sparse graphs and the message passing algorithm. Therefore, in several implementations, a designer is forced to implement either the turbo decoder or the LDPC decoder. The main idea behind this work is to enable the implementation of both decoders using a common architecture. We view the constituent convolutional code in a turbo code as a block code, and construct a sparse parity check matrix for it. Then, the sparse matrix and the associated bipartite graph are used for decoding the convolutional code by soft message passing algorithms. Simulation results show a manageable degradation in performance with a reduction in complexity. I. INTRODUCTION Turbo codes and Low Density Parity Check (LDPC) codes have been shown to be practical codes that can approach Shannon capacity in several communication systems [1][2]. Turbo codes are essentially interleaved concatenated convo- lutional codes, and their exceptional performance is because of the powerful ‘turbo’ decoder. Turbo decoding is based on trellis soft-decision decoding algorithms that are run iteratively with exchange of extrinsic information. LDPC codes are linear block codes with sparse parity check matrices. These matrices may be represented effectively by a bipartite graph, and LDPC codes are decoded on these graphs using soft message passing algorithms. The bipartite graph is analogous to the trellis of convolutional codes in the sense that it provides a complete representation of the code and aids in the description of the decoding algorithm. In terms of performance and implementation complexity, LDPC codes and turbo codes are highly comparable, espe- cially at coding rates around 1/2. In many recent wireless standards such as 3GPP LTE and WiMax, both turbo and LDPC codes have been recommended at the encoder [3]. However, the decoder for turbo codes involves trellises and the BCJR algorithm, while the decoder for LDPC codes uses sparse graphs and the message passing algorithm. Therefore, in several implementations, a designer is forced to implement either the turbo decoder or the LDPC decoder. This essentially means one of the two codes have to be chosen. The main idea behind this work is to enable the implementation of both...
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This note was uploaded on 01/25/2011 for the course SCE 5441 taught by Professor Lung during the Spring '10 term at Carleton CA.

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Common Architecture for Decoding Turbo and LDPC Codes -...

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