5.1 - CIRCUIT IMPLEMENTATION STRATEGIES LOGIC ARRAYS...

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Copyright © 2004 by Miguel A. Marin Revised 2005-02-03 1 CIRCUIT IMPLEMENTATION STRATEGIES LOGIC ARRAYS ± PROGRAMMING LOGIC DEVICES ± PROGRAMMABLE LOGIC ARRAY (PLA) ± PROGRAMMABLE ARRAY LOGIC (PAL) ± COMMERCIAL PROGRAMMABLE LOGIC DEVICES (CPLD’s) ± FIELD-PROGRAMMABLE GATE ARRAYS ± IMPLEMENTATION EXAMPLES ± COMBINATIONAL CIRCUIT DESIGN USING PLA’S AND PAL’S ± COMBINATIONAL CIRCUIT DESIGN USING MSI BUILDING BLOCKS ± DESIGN EXAMPLE USING SEVERAL IMPLEMENTATION STRATEGIES
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Copyright © 2004 by Miguel A. Marin Revised 2005-02-03 2 PROGRAMMING LOGIC DEVICES PROGRAMMABLE LOGIC ARRAY (PLA) ± CONTAINS AN AND-ARRAY AND AN OR-ARRAY ± AND-ARRAY IS USED TO IMPLEMENT BOOLEAN TERMS ± OR-ARRAY IS USED TO PRODUCE THE DESIRED BOOLEAN FUNCTION BY OR’ING THE TERMS GENERATED BY THE AND- ARRAY ± ALL TERMS PRODUCED BY THE AND-ARRAY ARE ACCESSIBLE TO ALL OR-OUTPUT GATES OF THE OR-ARRAY, MEANING THAT TERMS CAN BE SHARED AMONG OUTPUT FUNCTIONS. ± COMMERCIAL PLA’S USE TWO NOR PLAINS TO IMPLEMENT THE AND- AND OR-ARRAYS
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Copyright © 2004 by Miguel A. Marin Revised 2005-02-03 3 PROGRAMMING LOGIC DEVICES PROGRAMMABLE LOGIC ARRAY (PLA) ± PLA’S ARE PROGRAMMED BY ‘BURNING’ UNWANTED CONNECTIONS ± EXAMPLES FROM BROWN’S TEXTBOOK PAGES 96 AND 97:
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Copyright © 2004 by Miguel A. Marin Revised 2005-02-03 4 PROGRAMMING LOGIC DEVICES PROGRAMMABLE ARRAY LOGIC (PAL) ± CONTAINS AN AND-ARRAY AND AN OR-ARRAY ± AND-ARRAY IS USED TO IMPLEMENT BOOLEAN TERMS ± OR-ARRAY IS USED TO PRODUCE THE DESIRED BOOLEAN FUNCTION BY OR’ING THE TERMS GENERATED BY THE AND- ARRAY ± A FIXED NUMBER OF TERMS PRODUCED BY THE AND-ARRAY ARE ACCESSIBLE TO EACH ONE OF THE OR-OUTPUT GATES OF THE OR-ARRAY, MEANING THAT TERMS CANNOT BE SHARED AMONG OUTPUT FUNCTIONS. ± COMMERCIAL PAL’S USE TWO NOR PLAINS TO IMPLEMENT THE AND- AND OR-ARRAYS
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Copyright © 2004 by Miguel A. Marin Revised 2005-02-03 5 PROGRAMMING LOGIC DEVICES PROGRAMMABLE ARRAY LOGIC (PAL) ± PAL’S ARE PROGRAMMED BY ‘BURNING’ UNWANTED CONNECTIONS ± EXAMPLE FROM BROWN’S TEXTBOOK PAGE 98:
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Copyright © 2004 by Miguel A. Marin Revised 2005-02-03 6 PROGRAMMING LOGIC DEVICES SIMPLE COMMERCIAL PROGRAMMABLE LOGIC DEVICES (CPLD’s) ± THEY ARE GENERALLY PAL DEVICES WHERE ADDITIONAL FEATURES HAVE BEEN ADDED, SUCH AS: ± BIDIRECTIONAL OUTPUTS BY USING A TRI-STATE GATE AT THE OUTPUT OF EACH OR-GATE. ± FEEDBACK LINES ± A STORAGE DEVICE (D-FLIPFLOP) AT EACH OUTPUT, TO STORE OR NOT, THE CORRESPONDING OUTPUT FUNCTION OR ITS COMPLEMENT. ± THESE ADDITIONAL FEATURES ARE SHOWN ON THE NEXT SLIDE
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Copyright © 2004 by Miguel A. Marin Revised 2005-02-03 7 PROGRAMMING LOGIC DEVICES SIMPLE COMMERCIAL PROGRAMMABLE LOGIC DEVICES (CPLD’s) ± EXAMPLE: Extra circuitry added to OR-gate outputs of a PAL example (From Brown’s Textbook page 99)
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Copyright © 2004 by Miguel A. Marin Revised 2005-02-03 8 PROGRAMMING LOGIC DEVICES COMPLEX COMMERCIAL PROGRAMMABLE LOGIC DEVICES (CPLD’s) ± EXAMPLE: (Page 102 of Brown’s Textbook)
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This note was uploaded on 01/27/2011 for the course ECSE 323 taught by Professor Rk during the Spring '10 term at McGill.

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5.1 - CIRCUIT IMPLEMENTATION STRATEGIES LOGIC ARRAYS...

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