ICS233_Lecture7 Slides

ICS233_Lecture7 Slides - Computer Architecture & Assembly...

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1 Lecture Slides on Computer Architecture ICS 233 @ Dr A R Naseer 1 MIPS MIPS PROCESSOR PROCESSOR INSTRUCTION SET INSTRUCTION SET ICS 233 ICS 233 Computer Architecture & Computer Architecture & Assembly Language Assembly Language Lecture Slides on Computer Architecture ICS 233 @ Dr A R Naseer 2 ICS 233 ICS 233 Computer Architecture & Computer Architecture & Assembly Language Assembly Language Lecture 7 Lecture 7
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2 Lecture Slides on Computer Architecture ICS 233 @ Dr A R Naseer 3 Lecture Outline ± MIPS Instruction I-Type Format ± MIPS I-type ALU Instructions ± MIPS I-type Data Transfer Instructions Lecture Slides on Computer Architecture ICS 233 @ Dr A R Naseer 4 I-Type Format Constants are used quite frequently in programs – The R-type shift instructions have a 5-bit shift amount constant What about other instructions that need a constant? I-Type: Instructions with Immediate Operands 16-bit immediate constant is specified immediately in the instruction – Rs is the source register number – Rt is now the destination register number (for R-type it was Rd) Examples of I-Type ALU Instructions: – Add immediate: addi $s1, $s2, 5 # $s1 = $s2 + 5 – OR immediate: ori $s1, $s2, 5 # $s1 = $s2 | 5 Op 6 Rs 5 Rt 5 immediate 16
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3 Lecture Slides on Computer Architecture ICS 233 @ Dr A R Naseer 5 I-Type ALU Instructions imm 16 = 10 rt = $s1 rs = $s2 op = 0x9 $s1 = $s2 + 10 addiu $s1, $s2, 10 imm 16 = 10 rt = $s1 rs = $s2 op = 0x8 $s1 = $s2 + 10 addi $s1, $s2, 10 imm 16 = 10 rt = $s1 rs = $s2 op = 0xc andi $s1, $s2, 10 imm 16 = 10 rt = $s1 rs = $s2 op = 0xd $s1 = $s2 | 10 ori $s1, $s2, 10 imm 16 = 10 rt = $s1 rs = $s2 op = 0xe $s1 = $s2 ^ 10 xori $s1, $s2, 10 imm 16 = 10 rt = $s1 0 op = 0xf $s1 = 10 << 16 lui $s1, 10 I-Type Format Meaning Instruction addi: overflow causes an arithmetic exception – In case of overflow, result is not written to destination register addiu: same operation as addi but overflow is ignored Immediate constant for addi and addiu is signed – No need for subi or subiu instructions Immediate constant for andi, ori, xori is unsigned Lecture Slides on Computer Architecture ICS 233 @ Dr A R Naseer 6 MIPS - Arithmetic Instructions ± addi (add immediate signed ) ¾ Instruction Mnemonic : addi rd, rs, const ;where rs, rd are registers, ; const is a 16-bit constant value ;overflow detected ¾ Meaning : rd Å rs + const ¾ Example : addi $s1, $s2, 100 ; $s1 Å $s2 + 100 ___________________________________________________________ ± addiu (add immediate unsigned) ¾ Instruction Mnemonic : addiu rd, rs, const
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This note was uploaded on 01/27/2011 for the course ICS 253 taught by Professor Arnasser during the Spring '10 term at GWU.

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ICS233_Lecture7 Slides - Computer Architecture & Assembly...

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