ch6_4 - Combinational Design Chapter 6, Sections 6-10 6.3...

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March 29, 2010 COCOS10 1 Combinational Design Chapter 6, Sections 6-10 6.3 PLDs 6.4 Decoders 6.5 Encoders 6.6 Three-state devices and buses 6.7 Multiplexers 6.8 EXOR and Parity Circuits 6.9 Comparators 6.10 Adders, Subtractors and ALUs
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March 29, 2010 COCOS10 2 Review: PAL with IO pins used for input IO6 = (IO4•IO5’)’ Here I4 determines which IO pin is input and which is output. IN IN OUT H
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March 29, 2010 COCOS10 3 5-to-32 Decoder cascading 74x138 3-to-8 decoders using a steering circuit Decode 11011 Leftmost two bits enable one of four decoders. Here N4,N3 = 11 select 24-31 decoder , and N2,N1,N3 = 011 decodes to Y3
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March 29, 2010 COCOS10 4 Cascading Priority Encoders 32-input priority encoder EO enables lower decoders if there is no higher input GS_L if some input low Logic complicated: work through it with examples! H L L H H H H H
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March 29, 2010 COCOS10 5 Eight input, 1-bit bus driver SSRC selects alternative inputs P…W 1-bit party line 3 to 8 decoder
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March 29, 2010 COCOS10 6 Transceiver for four two-bit buses All the buses are driven either by a constant, or by one of the other buses. The source bus is driven with 00.
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March 29, 2010 COCOS10 7 74x157 2-input, 4-bit multiplexer (1-bit Select) Note that input pins are interlaced
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March 29, 2010 COCOS10 8 Mux realization of arbitrary logic function A 0 0 0 0 1 1 1 1 B 0 0 1 1 0 0 1 1 C 0 1 0 1 0 1 0 1 F 1 0 1 0 0 0 1 1 C C 0 1 S1 S0 A B 4:1 MUX 0 1 2 3 C C 0 1 F
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March 29, 2010 COCOS10 9 Using a 3-to-8 binary decoder as a 1-bit, 8-output demux (the data is on the GO pin (G2A here) !)
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March 29, 2010 COCOS10 10 A B C D A B C D A B C D A B C D A B C D A B C D A B C D A B C D A B C D A B C D A B C D A B C D A B C D A B C D A B C D A B C D 0 1 2 3 4 5 6 7 8 9 10 1 1 12 13 14 15 A S 3 S 2 S 1 S 0 4:16 decoder Enb = 1 B C D F 1 F 3 F 2 D C B A D C B A D C B A F 1 + + = Logic can also be done with a decoder & OR gates:
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March 29, 2010 COCOS10 11 Useful SSI modules PLA, PAL, GAL, CMOS PLD, EEPLD Decoder Binary Encoder Priority Encoder Mux Demux Parity cct Equivalence cct Comparator # of inputs ? # of outputs ?
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March 29, 2010 COCOS10 12 Useful modules PLA, PAL, GAL, CMOS PLD, EEPLD fuses IO, 7+ intmem wired, exmem capmem Decoder: 101 0010 0000 n:2^n Binary Encoder: 0010 0000 101 n:lg n Priority Encoder: 0010 1100 101 Mux: lg n + n:1 (m bits at a time) Demux: lg n + 1:n (m bits at a time) Parity n:1 ~ XOR combine 2-input XORs Equivalence n:1 ~ XNOR combine 2-input XNORs Comparator 2n:2 parallel comparison of pairs of bytes iterative comparison of multiple pairs of bytes
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March 29, 2010 COCOS10 13 Useful tricks 3-state buffer for bidirectional PAL/GAL IO pins input A tells XOR whether to invert input B combine devices for greater bit-width multiple input enables, output enable, got something high order bits to select active unit steering circuit to select active unit informative signal names for active-high, active-low
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ch6_4 - Combinational Design Chapter 6, Sections 6-10 6.3...

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