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Chapter 2 - v3.1 - Chapter 2 Programming Model Addressing...

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14 Chapter 2 Programming Model, Addressing Modes and Instruction Set An assembly language programmer should at least be familiar with the following features of the processor: Register set Instruction set Addressing modes Memory organization CPU Registers An MPU’s programming model shows only those internal registers that the programmer can directly control via the MPU’s instruction set. Programming Model of the 68HC11 Accumulators A,B and D : - There are two 8-bit accumulators (ACCA and ACCB) - Each may be a source or destination operand for 8-bit instructions. - ACCD is the concatenation of A and B and instructions that modify ACCD actually modify ACCA and ACCB. e.g. LSLA LSLD C b7 ........... .......... b0 0 C b7 ............ ......... b0 0 b7 .... ................. b0 ACCA ACCB ACCA
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15 Index registers X and Y : The two 16-bit index registers are used primarily for indexed addressing (will be studied in addressing modes). There are also some arithmetic instructions involving the index registers. e.g. INX (increments the contents of index register X, i.e., (IX) (IX)+$0001) Stack pointer (SP) : The 16-bit stack pointer maintains a program stack (will be studied later in detail) in RAM and must be initialized to point to RAM area before use. Program counter (PC) : Although it is shown in the programming model, the programmer does not have direct control over it like the other registers. It is usually given to show the amount of memory that can be directly addressed by the processor (the number of bits in the PC indicate the address range). Condition code register (CCR) : The 8-bit condition code register consists of individual bits, called flags , with different meanings. Each flag is used to indicate the status of a particular MPU condition and the logic value of the flags can be examined under program control to determine what sequence of instruction to follow. The flags in CCR are carry, overflow, zero, negative, interrup mask, half-carry, X-interrupt mask and stop disable. e.g. Zero flag indicates whether the result of the previous operation is zero or not CLRA instructions clears ACCA and sets the zero (Z) flag. Instruction Set An MPU instruction usually has two parts, the opcode and the operand . - the opcode tells the CPU what operation to perform - the operand tells the CPU what data to operate on e.g. 86 5A (LDAA #$5A in assembly language) In 8-bit microprocessors, the instructions usually have one-byte opcodes but in 68HC11 there are also two byte opcodes (called the prebyte system) for increasing the number of possible instructions (because of having an additional 16-bit IY register).
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