Chapter 5 - v3.1 - Chapter 5 Clocked Operation, Bus...

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40 Chapter 5 Clocked Operation, Bus Concepts, Address Decoding Clock Circuitry The clock is a periodic sequence of pulses. MC68HC11 contains an internal clock generator. Connecting a crystal to the crystal pins (XTAL, EXTAL) with a clock frequency of 8 MHz (max.) creates an internal clock frequency of 2 MHz (the crystal is internally divided by a factor of 4). This clock is referred to as the system clock or the E clock . Crystal connection Clock details and port read timing During each clock cycle, E goes low first, then high. When E clock output is low, an internal process is taking place. When it is high, the MCU is writing or reading data. Port C is an I/O port when the MCU operates in single-chip mode. An instruction to read data from an input data takes several cycles depending on the type of instruction and its addressing mode. The figure given above shows the last Cycle time Clock fall time Peripheral data setup time Peripheral data hold time Clock rise time
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41 cycle during which MCU latches in the data at the port pins. The MCU latches in the data when the clock falls. Note that the timing parameters are important in circuit design. The peripheral device must provide stable data within the time limits shown relative to the clock. Data should be retained for a short period after E goes low again. Timing diagrams: Show how signals change over time. They can show either one or multiple signals (for example bus signals) on the same diagram. In microcontroller systems bus transitions occur in relation to a clock signal. Single bit (line) timing diagram Bus timing diagram Bus Operations Bus: Typically a series of etched copper lines on a printed circuit board connecting plug-in sockets for other PCBs. A set of signal lines. μ P signals can be divided into three separate busses that transfer data, address and control information. Bus structure Valid data Long period of time Invalid data High impedance state logic 1 logic 0 falling edge rising edge
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42 Address bus : 16 bit -> capable of addressing 64 Kbytes Data bus : 8 bit, bi-directional, three-state Control bus : R/W, E, etc. General bus operations: 1. Processor places the desired peripheral’s address to the address bus. 2. Processor [peripheral] places desired data to the data bus for write [read] 3. Operation is directed by various control lines that are included in the control bus Bus is not a static connection mechanism. Only one device can drive the bus at a time. For an MCU to use only one device at a time, it enables the device, meaning that it gives permission to the device to use the bus. The MCU disables other devices, meaning that it refuses permission. To disable other devices, the MCU must effectively “disconnect” them from the bus. To do this, it puts them in a state called high impedance . This is like opening a switch. An open switch has infinite resistance, so it is
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Chapter 5 - v3.1 - Chapter 5 Clocked Operation, Bus...

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