Combined Tutorials_xc06_ubuntu_v3 for 1st lab work

Combined Tutorials_xc06_ubuntu_v3 for 1st lab work -...

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Unformatted text preview: Middle East Technical University Electrical and Electronics Engineering Department EE413 – Introduction to VLSI Design EE413 – Introduction to VLSI Design Tutorials Tutorials METU MEMS-VLSI Research Group Last updated on 2009-10-28 1 T ABLE ABLE   OF OF  C  C ONTENTS ONTENTS 1. Using PC Laboratory...................................................................................................................................3 1.1. Introduction..........................................................................................................................................3 1.2. Running Cadence..................................................................................................................................3 1.2.1. Initializing Cadence Environment.....................................................................................................................3 1.2.2. Running Cadence ..............................................................................................................................................4 1.2.3. How to Log out?................................................................................................................................................4 2. Schematic Entry of a CMOS Inverter.......................................................................................................5 2.1. Create a New Library...........................................................................................................................5 2.2. Schematics of a CMOS Inverter...........................................................................................................6 3. Transient Simulation of Schematics...........................................................................................................9 4. Basics of Layout Drawing.........................................................................................................................12 4.1. What is LAYOUT?.............................................................................................................................12 4.2. CMOS Process and Layout Drawing Step by Step............................................................................12 4.2.1. Step 1 – Active Regions and Wells.................................................................................................................12 4.2.2. Step 2 – Polysilicon.........................................................................................................................................13 4.2.3. Step 3 – N+ and P+ Diffusion..........................................................................................................................13 4.2.4. Step 4 - Contacts..............................................................................................................................................13 4.2.5. Step 5 – Metal Deposition................................................................................................................................14Step 5 – Metal Deposition....
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This note was uploaded on 01/30/2011 for the course EE 413 taught by Professor Akın during the Fall '10 term at Middle East Technical University.

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Combined Tutorials_xc06_ubuntu_v3 for 1st lab work -...

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