ece_371_midtermKey

ece_371_midtermKey - Ii: ECE 371 MIDTERM EXAM (A) FALL 2007...

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Unformatted text preview: Ii: ECE 371 MIDTERM EXAM (A) FALL 2007 NAME 1A 1. KEY The decimal value of the 8-bit two’s complement signed binary number 11001011 is -53 (show work) . The Synchronous Pipelined SRAM in Hall Figure 1-17 essentially functions as a shift register stage. The input address register and the output data register each have a propagation delay of 2 ns, 3 setup time of 1 ns,- and a hold time of 1 ns. The memory array has a propagation delay of 4 ns. Calculate the maximum frequency at which this device can be clocked, assuming no slack time is needed. (Show work.) Tclk—min = TFde + TPDmem + Tsu L/ FM“: 1!? ns = 14 MHz Li 3. Current SDRAMs use a technique called Source Synchronous Data Transfer. Briefly describe how this works and explain how it makes a higher data transfer rate possible. The device sending the data creates a strobe signal that has a very close timing relationship with the data. This strobe signal is sent to the receiver along the same path as the data, so it arrives with the same timing as the data. This strobe signal can be used to accurately latch the data in the receiving system. Since the strobe signal has very close timing with the data, data can be L/ sent at a higher rate without violating the setup or hold time of the receiving device. ~C. 4. ln pipelined processors such as the Xscale processors we have been discussing, data stalls can produce a major performance hit. Briefly describe how a data cache works and explain how a cache reduces data stalls in some programs. As part of your explanation, give a case where a data cache would not reduce data stalls. A cache is a small block of fast SRAM that is located on chip where it can be accessed in one clock cycle. The first time a data word is accessed, it must be read from SDRAM which is slower and causes significant stalls. If the data word is then loaded into the data cache, it can be accessed in one clock cycle (no stalls) for future accesses. The obvious case where the cache does not help is the case where a data word is only accessed once. 1A 6) ® ECE 371 MIDTERM EXAM (A) FALL 2007 2A 5. With the help of the template in Hall Appendix A1, show the LABELED machine code for the XScale instruction ORRSEQ R1 ,R5, R4. (Remember shift bits all 0’s) 31 0 nuunnuunnnnnnnnnnnnnnnnnnnnnunun Cond | | op | s | rn | rd | | rm 6. Given the User Mode register and memory contents shown below, predict the register contents and, where appropriate, the flag states produced by each of the following ARM/XScaIe instructions. Assume the values shown for register and memory contents are all in hexadecimal, assume Little-Endian memory storage, and assume the instructions are not sequential. NA for flags Not Affected R0 — 00004037 R8 — 0000003F R1 — OOOOFFFF R9 - R2 — AAAA5555 R10 — R3 — 5555AAAA R11 - R4 4 00000084 R12 R5 — 00008054 R13 R6 — 00008058 R14 R7 — PC(R15) ADDRESS CONTENTS (INCREASING ADDRESSES) SCORES 00008050 04 77 59 27 00008054 99 22 14 53 00008058 27 98 42 70 a. ORRS R1, R5, R2 ;R1_AAAAD555_ R2_AAAA5555_ R5 OOOOF8|054 NZCV ags_1000_ b. EOR R4, R4,R8 ;R4_OOOOOOBB_ R8_0000003F Flags_NA__ @ c. CMP R2, R3 ;R2__AAAA5555_ R3_5555AAAA Flags_oooo__ @ d. LDR R7, [R5, #4] ;R7_70429827_ R5_00008054 Flags_NA__ @ 7. Write the ARM assembly language instruction that will independently perform each of the specified actions. a. Set bits 31 :28 in R4 ORR R4, R4,#OXF0000000 ® b. Store byte in R2 in memory at address contained in R6 and point to next byte in memory. STRB R2, [R6], #1 MOV R0,R1, LSL #4 c. Shift word in R1 4 bit positions to the left and put result in R0. @ W/o ‘i ‘t \ ECE 371 MIDTERM EXAM (A) FALL 2007 3A 8. As discussed in class, the ARM-based processors do not have a divide instruction. However, to divide by a power of 2, you simply shift the dividend to the right a number of bit positions equal to the power of 2. . To perform division where the divisor is not a power of two, you can uses successive subtraction. For this problem assume that you are given 10 32-bit unsigned binary data samples in an array called Star_Rough and that your task is to divide each of the 10 binary numbers by a 16-bit scale factor and put each of the rounded results in order in an array called Star_Scaled. To get maximum benefit from your work, you decide that instead of doing the scaling directly in your mainline program, you will write a procedure that you can call to scale any array of 32- bit unsigned binary numbers by a specified scale factor. 8a. To start, think about the parameters you will have to pass to your procedure, so that it will have the data it needs and think about how you are going to pass these to the procedure. Using STANDARD PROGRAM STRUCTURES write the algorithm (steps) for the mainline program. Assume stack, and stack pointer are already initialized as needed. @ Load pointer to Star_Rough array Load pointer to Star_Scaled array Load array length Load 16-bit scale_factor Call scale procedure 8b. Using STANDARD PROGRAM STRUCTURES write the algorithm for the procedure that uses the passed parameters to divide each array element by the passed scale factor using successive subtraction, rounds the result, and puts the result in the appropriate element in the specified array. EPEAT Get value from Star_Rough array Set quotient variable to zero HILE remainder value from Star_Rough value greater than or equal to scale factor \i Subtract scale factor from value Increment quotient by 1 END WHILE IF remainder > = scale__factor.'2 Add 1 to quotient @ Store result in Star_Scaled array Increment pointers Decrement element counter UNTIL all 10 elements processed L/ ECE 371 MIDTERM EXAM (B) FALL 2007 4“- 8c. Write the FULLY COMMENTED assembly language instructions for JUST the section of the procedure that does the division and rounds the result. ASSUME: value from Star__Rough in R4, 16-bit scale_factor in R5, R6 = 0 AGAIN: CMP R4,R5 @ Compare scale factor in R5 with value in R4 BMI @ Minus if value in R4 < scale_factor — go round SUB R4, R4, R5 @ Value from Star_Rough in R4, Scale factor in R5 ADD R6, R6,#1 @ Increment quotient register by 1 B AGAIN @ GO check if remainder in R4 >= scale_factor MOV R7, R5,LSR #1 @ Divide Scale factor by 2, result in R7 CMP R4, R7 @ Compare scale_factor12 with remainder ADDPL R6, R6, #1 @ Add 1 to result if remainder >= scale_factor12 RND: W ...
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This note was uploaded on 02/01/2011 for the course ECE 371 taught by Professor Hall during the Spring '10 term at Portland State.

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ece_371_midtermKey - Ii: ECE 371 MIDTERM EXAM (A) FALL 2007...

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