HW1 - inputs available. 4. (Problem 1.14 in text) Consider...

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EE 3193 Intro. to VLSI Homework Assignment 1 Due beginning of class Feb. 1 1. Based on the evolutionary trends described in chapter 1, predict the integration complexity and the clock speed of a microprocessor in the year 2015. 2. (Problem 1.3 in text) Sketch a transistor-level schematic for a CMOS 4-input NOR gate. 3. (Problem 1.6 in text) Sketch a transistor-level schematic of a CMOS 3-inpt XOR gate. You may assume you have both true and complementary versions of the
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Unformatted text preview: inputs available. 4. (Problem 1.14 in text) Consider the design of a CMOS compound OR-AND-INVERT (OAI21) gate computing C B A F ) ( . a. Sketch a transistor-level schematic b. Sketch a stick diagram c. Estimate the area from the stick diagram d. Layout your gate using unit-sized transistors e. Compare the layout size to the estimated area...
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This note was uploaded on 02/02/2011 for the course EE 3193 taught by Professor Halenlee during the Spring '10 term at NYU Poly.

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