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cs2204ex1ans

# cs2204ex1ans - CS2204 DIGITAL LOGIC STATE MACHINE DESIGN...

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CS2204 DIGITAL LOGIC & STATE MACHINE DESIGN FALL 2009 Polytechnic Institute of NYU Page 1 of 2 Handout No : 14 October 27 , 200 9 EXAM I ANSWERS 1) i) The simplification to obtain the minimal SOP expression : ii) The minimal 2-level AND-OR gate network : 2) The truth table and the minterm lists : f(a, b, c, d) = (ac + a + a c + d + d b + ad + a b c d )(ab + c d + ab cd + b c ) = (ac + a + d + d b + ad )(ab + c d + ab cd + b c ) k + km = k = (ac + a + d + b + a )(ab + c d + ab cd + b c ) k + k m = k + m = (1)(ab + c d + ab cd + b c ) k + k = 1 & k + 1 = 1 = ab + c d + ab cd + b c k 1 = k = ab + c d + b c k + km = k b f(a, b, c, d) =ab + c d + b c a Single-rail d inputs c c c b b a b c d b c a b c d e w y z 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 1 0 0 0 0 0 1 1 1 0 0 0 0 1 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 1 1 0 1 0 0 0 0 1 1 1 1 0 0 0 1 0 0 0 0 0 0 0 1 0 0 1 0 1 1 1 1 0 1 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 0 0 0 1 1 1 1 1 0 1 0 0 0 0 1 1 1 0 1 1 0 1 1 1 1 1 1 1 1 0 y(a, b, c, d) m(9, 10, 12, 15)

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cs2204ex1ans - CS2204 DIGITAL LOGIC STATE MACHINE DESIGN...

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