cs614ex1

cs614ex1 - CS 6143 COMPUTER ARCHITECTURE II FALL 2010 EXAM...

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Polytechnic Institute of NYU Page 1 of 2 Handout No : 8 November 3, 2010 CS 6143 COMPUTER ARCHITECTURE II FALL 2010 150 MINUTES WORK ALL PROBLEMS OPEN BOOK EXAM I (25 pts) 1) Consider the following piece of old MIPS code for the unpipelined MIPS processor ( machine model number 0 ) : Assume that this is machine model number 2 (the MIPS Int+FP pipeline). Assume that the func- tional unit timings are as shown in Figure 2.2 on page 75 of the Hennessy book. Assume that there are two ( 2 ) iterations. In which clock period, will the second iteration of the loop be completed ? The L1 cache memories take one clock period each and there are no cache misses. Clearly show in which clock period the last iteration ends as done in class, i.e. together with all the necessary forwarding and write-in-the-first-half-read-in-the-second-half cases. Make sure you order the instructions so that the new code can run on this model correctly and fast. But, do not unroll the code ! (25 pts)
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cs614ex1 - CS 6143 COMPUTER ARCHITECTURE II FALL 2010 EXAM...

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