BME303_lecture7_chap3 - BME303 Intro. to Computing...

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1 BME303 Intro. to Computing Programmable Logic Array (PLA) Building blocks such as the full adder ABC 000 001 010 011 Connections 1 100 101 110 111 AND Array BME303 Intro. to Computing Logical Completeness You now can implement ANY truth table with AND, OR, NOT gates! ABCD 000 0 001 0 010 1 011 0 1. AND: combinations that yield a "1" in the truth table. 2 1 0 0 0 101 1 110 0 111 0 2. OR: the results of the AND gates.
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2 BME303 Intro. to Computing 2 Types of Logic Structures 1. Combinational Logic Circuit output depends only on the current inputs Stateless “Decision element” 2. Sequential Logic Circuit output depends on the sequence of inputs (past and 3 output depends on the sequence of inputs (past and present) stores information (state) from past inputs BME303 Intro. to Computing Problem Data Path Memory Devices, Circuits, … Language Machine (ISA) Architecture Algorithms Storage Elements R-S Latch Gated D latch Register Logic Structures Decoder Mux (multiplexer) Adder ttom Up 4 Micro-architecture Circuits Devices Logic Gates –N O T –O R –A N D Other gates Transistors Bo
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3 BME303 Intro. to Computing R-S Latch: Simple Storage Element • R is used to “ r eset” or “clear” the element – set it to zero. S is used to “ s et” the element – set it to one. S is used to et the element set it to one. 1 0 1 1 1 1 0 0 1 1 0 0 1 1 5 If both R and S are one, “out” could be either zero or one. – “quiescent” state -- holds ( STORE ) its previous value – note: if a is 1, b is 0, and vice versa BME303 Intro. to Computing R-S Latch: Simple Storage Element • R is used to “ r eset” or “clear” the element – set it to zero. S is used to “ s et” the element – set it to one. S is used to set it to one. 1 0 1 1 1 1 0 0 1 1 0 0 1 1 6 If both R and S are one, “out” could be either zero or one. – “quiescent” state -- holds ( STORE ) its previous value – note: if a is 1, b is 0, and vice versa
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4 BME303 Intro. to Computing Clearing the R-S latch • Suppose we start with output = 1, then change R to zero. Output changes to zero. 1 1 1 0 0 1 1 0 1 7 Then set R=1 to “store” value in quiescent state. 0 1 1 0 0 0 1 BME303 Intro. to Computing Setting the R-S Latch • Suppose we start with output = 0, then change S to zero. Output changes to one. 1 0 0 1 1 0 1 0 8 Then set S=1 to “store” value in quiescent state. 1 1 1 0
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5 BME303 Intro. to Computing R-S Latch Summary R = S = 1 – hold current value of the output in latch S = 0, R=1 – set output value to 1 R = 0, S = 1 – reset output value to 0 9 R = S = 0 – both outputs equal one – final state depends on the electrical properties of gates BME303 Intro. to Computing R-S Latch (004_RS_Latch.lgi) 10
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6 BME303 Intro. to Computing Gated D-Latch
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This note was uploaded on 02/02/2011 for the course BME 303 taught by Professor Ren during the Spring '08 term at University of Texas at Austin.

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BME303_lecture7_chap3 - BME303 Intro. to Computing...

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