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Unformatted text preview: Write the VHDL code to implement the Logic equations for outputs a, b, c, d, e, f and g. You can use either behavioral coding or structural coding. Save and attach the following waveforms in your lab report: • ±unctional or Behavorial Simulation waveform • Post-±it waveform. Report ±ollowing Parameters: • Cell Usage from Synthesis Report. • Print out the RTL Schematic view. • Resource Summary ±rom ±itter report. 1 ECE 332 Lab #5 2 3 Implementing the circuit on the CPLD board You will use the input circuit that you built in Lab 3 to provide the BCD inputs (i.e. D3, D2, D1, and D0). You will need to write the UCF fle ±or this experiment. I± you need help writing the UCF fle, please consult the documents provided in the Documentation Folder on your ”CoolRunner-2 CPLD Starter Kit Resource CD”. Best o± Luck!!...
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- Fall '08
- Schematic, CPLD