Lab10 - Name G Number Laboratory#Shift Register ECE 332 1...

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Name: G Number: Laboratory #Shift Register ECE 332 1 Introduction In this laboratory you will design a 4-bit parallel input/parallel output shift left register and im- plement it on the Cool Runner-2 CPLD board. Parts of this have already been completed in the pre-lab. Designing a 4-bit shift left register and drawing its circuit diagram(pre-lab, Part 2) Hint : Your circuit diagram should contain D Flip-Flops and 2x1 Multiplexers. As a part of this lab you must complete Write the VHDL code which implements the 4-bit shift left register. Implement your code on the Cool runner 2 CPLD board. 2 Circuit to be implemented as a part of Lab Re-iterating from pre-lab: Design a 4-bit parallel input/ parallel output Shift Register with the following charecterstics: A mode control signal ”Select” When Select = ”0”, the register loads D i . When Select = ”1”, the register shifts left (and Q 0 receives Serial input). A rising-edge triggred clock, Clock.
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Lab10 - Name G Number Laboratory#Shift Register ECE 332 1...

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