20085eeM216A_1_Hw1-F08

20085eeM216A_1_Hw1-F08 - Electrical Engineering Department...

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Electrical Engineering Department Fall 2008 EEM216A – Design of VLSI Circuits and Systems Homework #1 Due Friday, October 10, 2pm @ 56 127CC EIV MSOL students: e mail to ee216a@gmail.com The goal of this assignment is to get familiar with the 90nm CMOS technology we use in class, and to study technology scaling. Problem 1: MOS Transistor Models a) Using Spectre, generate the family of I-V curves ( help : online Tutorial 1 from EE115C has detailed instructions on how to do this) for NMOS and PMOS transistor with the following parameters: (W/L) n = 430nm/100nm, (W/L) p = 650nm/100nm Sweep |V DS | from 0V to 1V in 50mV increments |V GS | = 0.4V, 0.5V, 0.7V, 1.0V |V SB | = 0V, 0.5V Use the 90nm model as instructed in Tutorial 1 (section NN in the transistor model). Plot all I-V curves on one graph for NMOS and another graph for PMOS. Label bias conditions for V GS and V SB . Universal model b) Based on the results from the previous part, determine the following model parameters: V T0 , µ
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20085eeM216A_1_Hw1-F08 - Electrical Engineering Department...

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