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EE2000 Logic Circuit Design
3
Minimization of Logic Function

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Outline
3.1 The Meaning of Minimization
3.2 Minimization using Boolean Algebra
3.3 Introduction to Karnaugh Map
3.4 Minimization using Karnaugh Map
3.5 Boolean Function with Don’t-care
Cases
3.6 Minimzation using Quine-McCluskey
Method

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3.1 The Meaning of
Minimization

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Minimizing Logic Circuits
Boolean algebra is a useful tool for
simplifying / minimizing logic circuits
e.g. we can simplify
f = x’yz + x’yz’ + xz
using the postulates taught in last chapter
f = x’yz + x’yz’ + xz
= x’y + xz
(adjacency)
Reduce
f
from
sum of 3 products
to
sum of 2
product terms
!