Tutorial 7 Solution

# Tutorial 7 Solution - EE 2000 Logic Circuit Design Semester...

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EE 2000 Logic Circuit Design, Semester A, 2008/09 Tutorial 7 Solution Week 8 (20 th , 22 nd , 23 rd October, 2008) Level 1: Review Questions Chapter 4, question 30: Draw the logic diagram of a half subtractor using NOR gates only. Answer: X Y C S 0 0 0 0 0 1 0 1 1 0 0 1 1 1 1 0 Express S and C in POS form: S(X, Y) = (X + Y)(X’ + Y’) = [(X + Y)’+(X’ + Y’)’]’ C(X, Y) = XY = [(X)’ + (Y)’]’ Chapter 4, question 35: For the addition of two 4-bit numbers i) How many full adders are required? ii) How many outputs are there? iii) How many inputs are there? Answer: i) 4 full adders are required ii) 5 outputs (4-bit sum, 1-bit carry out) iii) 9 inputs (2 4-bit numbers, a 1-bit carry in) Chapter 4, question 38: What is the advantage of look-ahead-carry generator? Answer: To eliminate the delay of the ripple-carry bits X Y S C

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Level 2: Problems Question I: You have learnt how to construct a BCD-to-Excess-3-Code converter in the lecture. Now, instead of using two-level AND-OR circuit, construct (a) A BCD-to-Excess-3-Code converter using a 4-bit full adder only (b)
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Tutorial 7 Solution - EE 2000 Logic Circuit Design Semester...

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