Lecture15-SRAM_Design-6up

Lecture15-SRAM_Design-6up - EE141-Fall 2010 Digital...

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EE141 1 EECS141 1 Lecture #15 EE141 EE141 -Fall 2010 Fall 2010 Digital Integrated Digital Integrated Circuits Circuits Lecture 15 Lecture 15 SRAM Circuit Design SRAM Circuit Design EE141 2 EECS141 2 Lecture #15 Announcements Announcements ± Homework #6 due today ² Homework #7 due next Thurs. ² Project #1 out next Thurs. EE141 3 EECS141 3 Lecture #15 SRAM Circuit SRAM Circuit Design Design EE141 4 EECS141 4 Lecture #15 6-transistor CMOS SRAM Cell transistor CMOS SRAM Cell WL BL V DD M 5 M 6 M 4 M 1 M 2 M 3 BL Q Q EE141 5 EECS141 5 Lecture #15 SRAM Column SRAM Column WL2 WL0 WL3 BL BL_B EE141 6 EECS141 6 Lecture #15 SRAM Operation 0 1 0 1 Write Hold
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EE141 7 EECS141 7 Lecture #15 SRAM Operation SRAM Operation 0 1 • Q_b will get pulled up when WL first goes high • Reading the cell should not destroy the stored value Read EE141 8 EECS141 8 Lecture #15 CMOS SRAM Analysis (Read) CMOS SRAM Analysis (Read) 51 D D = II WL BL V DD M 5 M 6 M 4 M 1 V DD V DD V DD BL Q = 1 Q = 0 C bit C bit V () 2 1 5 ,5 1 2 DD Tn sat ox n ox DD Tn DD Tn crit n VV V WV Wv C C V V V L L µ ξ −− ⎛⎞ =− ⎜⎟ + ⎝⎠ EE141 9 EECS141 9 Lecture #15 CMOS SRAM Analysis (Read) CMOS SRAM Analysis (Read) 0 0 0.2 0.4 0.6 0.8 1 1.2 0.5 11.2 1.5
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Lecture15-SRAM_Design-6up - EE141-Fall 2010 Digital...

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