Lecture17-Scaling-6up - EE141-Fall 2010 Digital Integrated...

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EE141 1 EECS141 1 Lecture #17 EE141 EE141 -Fall 2010 Fall 2010 Digital Integrated Digital Integrated Circuits Circuits Lecture 17 Lecture 17 CMOS Scaling CMOS Scaling EE141 2 EECS141 2 Lecture #17 Announcements Announcements ± Homework #7 due today ² Project #1 out today, due next Thurs. ± Midterm 2 two weeks from today ± Let us know ASAP if you still don’t have a project partner EE141 3 EECS141 3 Lecture #17 CMOS Transistor CMOS Transistor Scaling Scaling EE141 4 EECS141 4 Lecture #17 Goals of Technology Scaling Goals of Technology Scaling ± Make things cheaper: ² Want to sell more functions (transistors) per chip for the same money ² Or build same products cheaper ² Price of a transistor has to be reduced ± But also want to be faster, smaller, lower power… EE141 5 EECS141 5 Lecture #17 Technology Scaling Technology Scaling ± Benefits of 30% “Dennard” scaling (1974): ² Double transistor density ² Reduce gate delay by 30% (increase operating frequency by 43%) ² Reduce energy per transition by 65% (50% power savings @ 43% increase in frequency) ± Die size used to increase by 14% per generation (not any more)
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Lecture17-Scaling-6up - EE141-Fall 2010 Digital Integrated...

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