Lecture19-Dynamic-6up - EE141-Fall 2010 Digital Integrated...

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EE141 1 EECS141 1 Lecture #19 EE141 EE141 -Fall 2010 Fall 2010 Digital Integrated Digital Integrated Circuits Circuits Lecture 19 Lecture 19 Dynamic Logic Dynamic Logic EE141 2 EECS141 2 Lecture #19 Announcements Announcements ± Midterm 2: Thurs. Nov. 4 th , 6:30- 8:00pm ² Includes all material up to and including Lecture 18 ² Exam starts at 6:30pm sharp ² Review session: Wed., Nov. 3 rd ? ± Project phase 2 out next Thurs., due following Fri. EE141 3 EECS141 3 Lecture #19 Class Material Class Material ± Last lecture ² Ratioed and Pass-Transistor Logic ± Today’s lecture ² Dynamic logic ± Reading ² Chapter 6 EE141 4 EECS141 4 Lecture #19 Dynamic Logic Dynamic Logic EE141 5 EECS141 5 Lecture #19 Dynamic CMOS Dynamic CMOS ± In static circuits, at every point in time (except when switching) the output is connected to either GND or V DD via a low resistance path. ² fan-in of n requires 2 n ( n N-type + n P-type) devices ± Dynamic circuits rely on the temporary storage of signal values on the capacitance of high impedance nodes. ² only requires
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Lecture19-Dynamic-6up - EE141-Fall 2010 Digital Integrated...

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