Lecture20-Adders-6up - EE141-Fall 2010 Digital Integrated...

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EE141 1 EECS141 1 Lecture #20 EE141 EE141 -Fall 2010 Fall 2010 Digital Integrated Digital Integrated Circuits Circuits Lecture 20 Lecture 20 Adders Adders EE141 2 EECS141 2 Lecture #20 Announcements Announcements ± Midterm 2: Thurs. Nov. 4 th , 6:30-8:00pm ² Exam starts at 6:30pm sharp ² Review session: Wed., Nov. 3 rd , 6pm ± Project phase 2 out this Thurs., due next Fri. ± Elad out of the office this afternoon ² Chintan will hold office hours today from 2-3pm ² Hanh-Phuc will hold extra office today from 4- 5pm ² Elad will hold extra office hours Thurs. 1-2pm EE141 3 EECS141 3 Lecture #20 Class Material Class Material ± Last lecture ² Dynamic logic ± Today’s lecture ² Adders ± Reading ² Chapter 11 EE141 4 EECS141 4 Lecture #20 Adders Adders EE141 5 EECS141 5 Lecture #20 An Intel Microprocessor An Intel Microprocessor 9-1 Mux 5-1 Mux 2-1 Mux ck1 CARRYGEN SUMGEN + LU 1000um b s0 s1 g64 sum sumb LU : Logical Unit SUMSEL a to Cache node1 REG Itanium has 6 64-bit integer execution units like this EE141 6 EECS141 6 Lecture #20 Bit Bit -Sliced Design Sliced Design Bit 3 Bit 2 Bit 1 Bit 0 Register Adder Shifter Multiplexer Control Data-In Data-Out Tile identical processing elements
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EE141 7 EECS141 7 Lecture #20 Itanium Integer Itanium Integer Datapath Datapath Fetzer, Orton, ISSCC’02 EE141 8 EECS141 8 Lecture #20 Data Paths Are Thermal Hogs Data Paths Are Thermal Hogs EE141 9 EECS141 9 Lecture #20 Full -Adder Adder AB Cout Sum Cin Full adder kill kill EE141 10 EECS141 10 Lecture #20 The Binary Adder The Binary Adder SABC i ⊕⊕ = A =B C i ABC i i i +++ C o AB BC i AC i ++ = EE141 11 EECS141 11 Lecture #20 Express Sum and Carry as a function of P, G, K Express Sum and Carry as a function of P, G, K Define 3 new variables which ONLY depend on A, B Generate (G) = AB Propagate (P) = A B Kill = A B Can also derive expressions for S and C o based on K and P Propagate (P) = A + B Note that we will sometimes use an alternate definition for EE141 12 EECS141 12 Lecture #20 Simplest Adder: Ripple -Carry Carry Worst case delay linear with the number of bits Goal: Make the fastest possible carry path circuit FA FA FA FA A 0 B 0 S 0 A 1 B 1 S 1 A 2 B 2 S 2 A 3 B 3 S 3 C i ,0 C o ,0 ( = C i ,1 ) C o ,1 C o ,2 C o ,3 t d = O( N ) t adder = ( N-1 ) t carry + t sum
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EE141 13 EECS141 13 Lecture #20 Complementary Static CMOS Full Adder: “Direct Direct ” Implementation Implementation 28 Transistors AB B A Ci Ci A X VDD V DD A B Ci B A B VDD A B C i Ci A B A C i B C o VDD S EE141 14 EECS141 14 Lecture #20
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Lecture20-Adders-6up - EE141-Fall 2010 Digital Integrated...

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