Lecture25-Clock-6up

Lecture25-Clock-6up - EE141-Fall 2010 Digital Integrated...

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EE141 1 EECS141 1 Lecture #25 EE141 EE141 -Fall 2010 Fall 2010 Digital Integrated Digital Integrated Circuits Circuits Lecture 25 Lecture 25 Clock Distribution Clock Distribution EE141 2 EECS141 2 Lecture #25 Announcements Announcements ± Homework #8 due today ± Project phase 3 ² Poster session Wed. Dec. 1 st , 3:30pm @ BWRC ² Final report: Mon. Dec. 6 th 5:00pm EE141 3 EECS141 3 Lecture #25 Class Material Class Material ± Last lecture ² Timing ± Today’s lecture ² Clock Distribution ± Reading ² Chapter 10 EE141 4 EECS141 4 Lecture #25 Clock Clock Distribution Distribution EE141 5 EECS141 5 Lecture #25 Clock Distribution Clock Distribution ± Single clock generally used to synchronize all logic on the same chip ² Need to distribute clock over the entire die ² While maintaining low skew/jitter ² (And without burning too much power) EE141 6 EECS141 6 Lecture #25 Clock Distribution Clock Distribution ± What’s wrong with just routing wires to every point that needs a clock?
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This note was uploaded on 02/06/2011 for the course EE 141 taught by Professor Staff during the Spring '08 term at Berkeley.

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Lecture25-Clock-6up - EE141-Fall 2010 Digital Integrated...

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