Lecture9-Transistors

Lecture9-Transistors - EE141 1 EE141 EECS141 1 Lecture#9...

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Unformatted text preview: EE141 1 EE141 EECS141 1 Lecture #9 Guest Lecturer: Andrei Vladimirescu EE141 EECS141 2 Lecture #9 Midterm on Friday Febr 19 6:30-8pm in 2060 Valley LSB Open book Do not forget your important class material nor calculator Covers from start of semester to optimization of complex logic – wires not included! Review session tomorrow Th 2/18 at 6:30pm Room to be announced on web-site No lab this week Hw 4 due next week Friday EE141 2 EE141 EECS141 3 Lecture #9 Last lecture Wiring + first glimpse at transitors (threshold) Today’s lecture Transistor models Reading (Ch 3) EE141 EECS141 4 Lecture #9 What do digital IC designers need to know? EE141 3 EE141 EECS141 5 Lecture #9 With positive gate bias, electrons pulled toward the gate With large enough bias, enough electrons will be pulled to "invert" the surface (p → n type) Voltage at which surface inverts: “magic” threshold voltage V T EE141 EECS141 6 Lecture #9 Threshold Fermi potential 2 Φ F is approximately 0.6V for p-type substrates γ is the body factor V T is approximately 0.45V for our process Depletion charge EE141 4 EE141 EECS141 7 Lecture #9 EE141 EECS141 8 Lecture #9 Pinch-off < V GS- V T < V DS EE141 5 EE141 EECS141 9 Lecture #9 For ( V GS – V T ) < V DS , the effective drain voltage and current saturate: ’ Of course, real drain current isn’t totally independent of V DS For example, approx. for channel-length modulation: ’ EE141 EECS141 10 Lecture #9 Cutoff: V GS-V T < Linear (Resistive): V GS-V T > V DS Saturation: 0 < V GS-V T < V DS ’ ’ EE141...
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This note was uploaded on 02/06/2011 for the course EE 141 taught by Professor Staff during the Spring '08 term at Berkeley.

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Lecture9-Transistors - EE141 1 EE141 EECS141 1 Lecture#9...

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