M16_3_discussion5 - states 3 Design and implementation...

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Discussion Note EEM16 Week5 1. Timing characteristics 2. Design and implementation - counter Design a 3 Flip-flop counter which transitions through states Q 2 Q 1 Q 0 = 000, 100, 110, 111, 011, 001 and then repeats. (a) Draw the state diagram and state transition table. (b) Draw the K-maps, clearly indicating the implicants that you use in your covers of the next-state functions. (c) Implement the counter using D flip flops and whatever gates you like. (d) Is your counter self starting? If yes, show the transitions of the unused states. If no, change it to make it self starting, and show the transitions of the unused
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Unformatted text preview: states. 3. Design and implementation - comparator Ex. 8.12 Implement a sequential (bit-serial) binary magnitude comparator for 16-bits operands. Describe two implementations: one beginning with the most-significant bit and the other with the less-significant bit. 4. Flip-flops Show how to implement a D flip-flop starting with a J-K flip-flop. Apply the necessary logic to the input of a J-K flip-flop such that it behaves like a D flip-flop. 5. Analysis network with flip-flops Exercise. 8.20...
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This note was uploaded on 02/09/2011 for the course M 16 taught by Professor . during the Spring '10 term at UCLA.

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